R-Car has a clock divider for CAN FD clock within the IP, whereas
it is not available on RZ/G2L.
Add clk_postdiv to struct rcar_canfd_hw_info to take care of this
difference.
Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
---
drivers/net/can/rcar/rcar_canfd.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/net/can/rcar/rcar_canfd.c b/drivers/net/can/rcar/rcar_canfd.c
index 0d131694c241..d226eb59010d 100644
--- a/drivers/net/can/rcar/rcar_canfd.c
+++ b/drivers/net/can/rcar/rcar_canfd.c
@@ -528,6 +528,7 @@ struct rcar_canfd_hw_info {
u32 max_channels;
/* hardware features */
unsigned multi_global_irqs:1; /* Has multiple global irqs */
+ unsigned clk_postdiv:1; /* Has CAN clk post divider */
};
/* Channel priv data */
@@ -600,6 +601,7 @@ static const struct can_bittiming_const rcar_canfd_bittiming_const = {
static const struct rcar_canfd_hw_info rcar_gen3_hw_info = {
.chip_id = RENESAS_RCAR_GEN3,
.max_channels = 2,
+ .clk_postdiv = 1,
};
static const struct rcar_canfd_hw_info rzg2l_hw_info = {
@@ -611,6 +613,7 @@ static const struct rcar_canfd_hw_info rzg2l_hw_info = {
static const struct rcar_canfd_hw_info r8a779a0_hw_info = {
.chip_id = RENESAS_R8A779A0,
.max_channels = 8,
+ .clk_postdiv = 1,
};
/* Helper functions */
@@ -1948,7 +1951,7 @@ static int rcar_canfd_probe(struct platform_device *pdev)
}
fcan_freq = clk_get_rate(gpriv->can_clk);
- if (gpriv->fcan == RCANFD_CANFDCLK && info->chip_id != RENESAS_RZG2L)
+ if (gpriv->fcan == RCANFD_CANFDCLK && info->clk_postdiv)
/* CANFD clock is further divided by (1/2) within the IP */
fcan_freq /= 2;
--
2.25.1
