On Wed, 19 Oct 2022 17:50:51 +0900
Yoshihiro Shimoda <yoshihiro.shimoda.uh@xxxxxxxxxxx> wrote:
> Add support for selecting host speed mode. For now, only support
> 1000M bps.
>
> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@xxxxxxxxxxx>
> ---
> drivers/net/phy/marvell10g.c | 23 +++++++++++++++++++++++
> 1 file changed, 23 insertions(+)
>
> diff --git a/drivers/net/phy/marvell10g.c b/drivers/net/phy/marvell10g.c
> index 383a9c9f36e5..daf3242c6078 100644
> --- a/drivers/net/phy/marvell10g.c
> +++ b/drivers/net/phy/marvell10g.c
> @@ -101,6 +101,10 @@ enum {
> MV_AN_21X0_SERDES_CTRL2_AUTO_INIT_DIS = BIT(13),
> MV_AN_21X0_SERDES_CTRL2_RUN_INIT = BIT(15),
>
> + MV_MOD_CONF = 0xf000,
> + MV_MOD_CONF_SPEED_MASK = 0x00c0,
> + MV_MOD_CONF_SPEED_1000 = BIT(7),
> +
Where did you get these values from? My documentation says:
Mode Configuration
Device 31, Register 0xF000
Bits
7:6 Reserved R/W 0x3 This must always be 11.
> /* These registers appear at 0x800X and 0xa00X - the 0xa00X control
> * registers appear to set themselves to the 0x800X when AN is
> * restarted, but status registers appear readable from either.
> @@ -147,6 +151,7 @@ struct mv3310_chip {
> int (*get_mactype)(struct phy_device *phydev);
> int (*set_mactype)(struct phy_device *phydev, int mactype);
> int (*select_mactype)(unsigned long *interfaces);
> + int (*set_macspeed)(struct phy_device *phydev, int macspeed);
> int (*init_interface)(struct phy_device *phydev, int mactype);
>
> #ifdef CONFIG_HWMON
> @@ -644,6 +649,16 @@ static int mv2110_select_mactype(unsigned long *interfaces)
> return -1;
> }
>
> +static int mv2110_set_macspeed(struct phy_device *phydev, int macspeed)
> +{
> + if (macspeed != SPEED_1000)
> + return -EOPNOTSUPP;
> +
> + return phy_modify_mmd(phydev, MDIO_MMD_VEND2, MV_MOD_CONF,
> + MV_MOD_CONF_SPEED_MASK,
> + MV_MOD_CONF_SPEED_1000);
> +}
Why not also support other speeds, if we are doing this already?
Marek
