Hi Geert,
On Thu, Oct 6, 2022 at 9:16 AM Geert Uytterhoeven <geert@xxxxxxxxxxxxxx> wrote:
>
> Hi Prabhakar, Biju,
>
> On Wed, Oct 5, 2022 at 2:56 PM Lad, Prabhakar
> <prabhakar.csengg@xxxxxxxxx> wrote:
> > On Wed, Oct 5, 2022 at 9:27 AM Biju Das <biju.das.jz@xxxxxxxxxxxxxx> wrote:
> > > > > On Mon, Sep 19, 2022 at 2:52 PM Biju Das <biju.das.jz@xxxxxxxxxxxxxx> wrote:
> > > > > > > On Mon, Sep 19, 2022 at 2:35 PM Biju Das <biju.das.jz@xxxxxxxxxxxxxx> wrote:
> > > > > > > > > From: Lad Prabhakar <prabhakar.mahadev-
> > > > lad.rj@xxxxxxxxxxxxxx>
> > > > > > > > > Add the WDT2 clocks to r9a07g044_crit_mod_clks[] list as WDT CH2 is
> > > > > > > > > specifically to check the operation of Cortex-M33 CPU on the
> > > > > > > > > RZ/{G2L, G2LC, V2L} SoCs and we dont want to turn off the clocks of
> > > > > > > > > WDT2 if it isn't enabled by Cortex-A55.
> > > > > > > > >
> > > > > > > > > This patch is in preparation to disable WDT CH2 from the RZ/G2L
> > > > > > > > > (alike
> > > > > > > > > SoCs) DTS/I by default.
> > > > > > > > >
> > > > > > > > > Reported-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> > > > > > > > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> > >
> > > I got confirmation that that using WDT2 from CA55 is prohibited.
> > > WDT2 is only for CM33.
> > >
> > > With CPG register, we can select whether CM33 to trigger CM33 cpu reset, or trigger system reset
> > > when WDT2 overflows.
> > >
> > > If WDT2 is used by CA55, it may result in unexpected behaviour.
> > >
> > Thanks.
> >
> > > So we may need to take WDT2 entries from binding + dtsi + clock table??
> > >
> > > Or
> > >
> > > Added it to critical clock list, to avoid changes in binding + dtsi + clock table
> > > at the expense of turning on the WDT2 clk unnecessarily.
>
> ... plus still risking to interfere with the CM33.
>
> > I'm in favour of option#1 except that we keep WDT2 entries in binding.
>
> Agreed (bindings are append-only).
>
I'll get the patches out to get rid of WDT2.
Cheers,
Prabhakar
