On Wed, Sep 28, 2022 at 1:08 PM Biju Das <biju.das.jz@xxxxxxxxxxxxxx> wrote:
> Due to clk rounding errors on RZ/G2L platforms, it selects a clock source
> with a lower clock rate compared to a higher one.
> For eg: The rounding error (533333333 Hz / 4 * 4 = 533333332 Hz < 5333333
> 33 Hz) selects a clk source of 400 MHz instead of 533.333333 MHz.
>
> This patch fixes this issue by adding a margin of (1/1024) higher to
> the clock rate.
>
> Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> ---
> v4->v5:
> * Moved upper limit calculation inside the for loop as it caused
> regression on R-Car M2-W board.
> * Removed Rb tag from Wolfram as there is some new changes.
Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
Still works fine on R-Car Gen2/Gen3, so:
Tested-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
