RE: [PATCH] mmc: renesas_sdhi: Add margins for main clock and hs clock

[Biju Das <biju.das.jz@xxxxxxxxxxxxxx>]

Hi Wolfram,

Thanks for the feedback.

> Subject: Re: [PATCH] mmc: renesas_sdhi: Add margins for main clock and
> hs clock
> 
> Hi Biju,
> 
> > diff --git a/drivers/mmc/host/renesas_sdhi_core.c
> > b/drivers/mmc/host/renesas_sdhi_core.c
> > index 6edbf5c161ab..539521f84e2f 100644
> > --- a/drivers/mmc/host/renesas_sdhi_core.c
> > +++ b/drivers/mmc/host/renesas_sdhi_core.c
> > @@ -128,6 +128,7 @@ static unsigned int
> renesas_sdhi_clk_update(struct tmio_mmc_host *host,
> >         struct clk *ref_clk = priv->clk;
> >         unsigned int freq, diff, best_freq = 0, diff_min = ~0;
> >         unsigned int new_clock, clkh_shift = 0;
> > +       unsigned int new_clock_margin;
> >         int i;
> >
> >         /*
> > @@ -156,7 +157,9 @@ static unsigned int
> renesas_sdhi_clk_update(struct tmio_mmc_host *host,
> >          */
> >         for (i = min(9, ilog2(UINT_MAX / new_clock)); i >= 0; i--) {
> >                 freq = clk_round_rate(ref_clk, new_clock << i);
> > -               if (freq > (new_clock << i)) {
> > +               new_clock_margin = (new_clock << i) + ((new_clock <<
> > + i) >> 10);
> > +
> > +               if (freq > new_clock_margin) {
> 
> new_clock_margin needs a comment explaining why we need it and set it
> to that particular value. Otherwise looks good to me.

Looks similar margin needs to be added to renesas_sdhi_set_clock()as well
Otherwise, CTL_SD_CARD_CLK_CTL is set to 0 and performance get impacted.

I will send v2 with these changes. Please provide feedback.

Cheers,
Biju