Re: [PATCH 3/4] arm64: dts: renesas: spider-cpu: Add MSIOF node

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Hi Wolfram,

On Wed, Aug 24, 2022 at 12:36 PM Wolfram Sang
<wsa+renesas@xxxxxxxxxxxxxxxxxxxx> wrote:
> Signed-off-by: Wolfram Sang <wsa+renesas@xxxxxxxxxxxxxxxxxxxx>

Thanks for your patch!

> --- a/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi
> @@ -101,6 +101,12 @@ &mmc0 {
>         status = "okay";
>  };
>
> +&msiof0 {
> +       pinctrl-0 = <&msiof0_pins>;
> +       pinctrl-names = "default";
> +       status = "okay";
> +};

I assume you added this becomes Spider has an MSIOF pin header?

> +
>  &pfc {
>         pinctrl-0 = <&scif_clk_pins>;
>         pinctrl-names = "default";
> @@ -116,6 +122,12 @@ mmc_pins: mmc {
>                 power-source = <1800>;
>         };
>
> +       msiof0_pins: msiof0 {
> +               groups = "msiof0_clk", "msiof0_sync", "msiof0_rxd",
> +                        "msiof0_txd", "msiof0_ss1", "msiof0_ss2";

MSIOF0_SS2 is also used as the VDDQ18_33_SPI voltage selector, which
is used as the power source for various components (but not available
on the MSIOF0 pin header?), so I'm a but reluctant to add this patch...

> +               function = "msiof0";
> +       };
> +
>         scif0_pins: scif0 {
>                 groups = "scif0_data", "scif0_ctrl";
>                 function = "scif0";

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds



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