Hi Geert-san, > From: Geert Uytterhoeven, Sent: Thursday, June 9, 2022 12:40 AM > > Hi all, > > Currently, the R-Car S4-8 DTS describes a single Cortex-A55 CPU core > only. This patch series completes the description of the Cortex-A55 > lusters by describing L3 caches, CPU cores 1-7, CPU map, PSCI for CPU bring up, > CPUIdle, and CPU core clocks. > > This has been tested on the Spider development board, where now all 8 > Cortex-A55 CPU cores are available after boot. All but the first CPU > core can be controlled from sysfs (/sys/*/*/cpu/cpu[0-7]/online). > CPU core performance follows the CPU core clocks, when changing the > frequency of the latter. > > I plan to queue this in renesas-devel for v5.20. > > Thanks for your comments! Thank you for the patches! The patches look good to me. And, I tested on my environment, it worked correctly. So, Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@xxxxxxxxxxx> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@xxxxxxxxxxx> Note that CPUIdle on R-Car S4-8 required the latest TF-A firmware which our BSP team made. Otherwise, the system could not boot correctly if CPUIdle is enabled. Best regards, Yoshihiro Shimoda
