On Wed, 30 Mar 2022 16:40:14 +0100, Phil Edworthy wrote:
> Define RZ/V2M (R9A09G011) Clock Pulse Generator core clocks, module clock
> outputs (CPG_CLK_ON* registers), and reset definitions (CPG_RST_*
> registers) in Section 48.5 ("Register Description") of the RZ/V2M Hardware
> User's Manual (Rev. 1.10, Sep. 2021).
>
> Signed-off-by: Phil Edworthy <phil.edworthy@xxxxxxxxxxx>
> Reviewed-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> ---
> include/dt-bindings/clock/r9a09g011-cpg.h | 337 ++++++++++++++++++++++
> 1 file changed, 337 insertions(+)
> create mode 100644 include/dt-bindings/clock/r9a09g011-cpg.h
>
Acked-by: Rob Herring <robh@xxxxxxxxxx>
