Hi Biju,
On Mon, Mar 7, 2022 at 8:24 PM Biju Das <biju.das.jz@xxxxxxxxxxxxxx> wrote:
> RSPI1 (SPI1) interface is available on PMOD0 connector (J1) on the
> carrier board. This patch adds pinmux and spi1 nodes to the carrier
> board dtsi file and drops deleting pinctl* properties from DTS file.
>
> RSPI1 interface is tested by setting the macro SW_RSPI_CAN to 0.
>
> Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
Thanks for your patch!
> --- a/arch/arm64/boot/dts/renesas/r9a07g044c2-smarc.dts
> +++ b/arch/arm64/boot/dts/renesas/r9a07g044c2-smarc.dts
> @@ -13,9 +13,3 @@
> model = "Renesas SMARC EVK based on r9a07g044c2";
> compatible = "renesas,smarc-evk", "renesas,r9a07g044c2", "renesas,r9a07g044";
> };
> -
> -&spi1 {
> - /delete-property/ pinctrl-0;
> - /delete-property/ pinctrl-names;
> - status = "disabled";
> -};
The common properties in rz-smarc-common.dtsi are indeed no
longer removed...
> --- a/arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi
> +++ b/arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi
> @@ -74,6 +74,14 @@
> };
> };
>
> +#if (!SW_RSPI_CAN)
> +&spi1 {
Spi1 should be inserted after scif1 below.
> + pinctrl-0 = <&spi1_pins>;
> + pinctrl-names = "default";
> + status = "okay";
> +};
> +#endif
... so regardless of the value of SW_RSPI_CAN, spi1 will be enabled?
I think you want to protect the disable block in r9a07g044c2-smarc.dts
by #if SW_RSPI_CAN/#endif instead?
+ #if SW_RSPI_CAN
&spi1 {
/delete-property/ pinctrl-0;
/delete-property/ pinctrl-names;
status = "disabled";
};
+ #endif
> +
> /*
> * To enable SCIF1 (SER0) on PMOD1 (CN7), On connector board
> * SW1 should be at position 2->3 so that SER0_CTS# line is activated
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
