RE: [PATCH v3 2/4] arm64: dts: renesas: rzg2lc-smarc: Add macros for DIP-Switch settings

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Hi Geert,

Thanks for the feedback.

> Subject: Re: [PATCH v3 2/4] arm64: dts: renesas: rzg2lc-smarc: Add macros
> for DIP-Switch settings
> 
> Hi Biju,
> 
> On Thu, Feb 3, 2022 at 6:06 PM Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> wrote:
> > RZ/G2LC SoM uses DIP-SWitch SW1 for various pin multiplexing functions.
> >
> > This patch describes DIP-SWitch SW1 settings on SoM and adds the
> > corresponding macros for enabling pinmux functionality on RZ/G2LC
> > SMARC EVK.
> >
> > Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> > Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> 
> Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx> i.e. will queue
> in renesas-devel for v5.18.
> 
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi
> > @@ -0,0 +1,36 @@
> > +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +/*
> > + * Device Tree Source for the RZ/G2LC SMARC EVK parts
> > + *
> > + * Copyright (C) 2022 Renesas Electronics Corp.
> > + */
> > +
> > +#include <dt-bindings/gpio/gpio.h>
> > +#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
> > +
> > +/*
> > + * DIP-Switch SW1 setting on SoM
> > + * 1 : High; 0: Low
> > + * SW1-2 : SW_SD0_DEV_SEL      (1: eMMC; 0: uSD)
> > + * SW1-3 : SW_SCIF_CAN         (1: CAN1; 0: SCIF1)
> > + * SW1-4 : SW_RSPI_CAN         (1: CAN1; 0: RSPI1)
> > + * SW1-5 : SW_I2S0_I2S1                (1: I2S2 (HDMI audio); 0: I2S0)
> > + * Please change below macros according to SW1 setting  */
> > +
> > +#define SW_SCIF_CAN    0
> > +#if (SW_SCIF_CAN)
> > +/* Due to HW routing, SW_RSPI_CAN is always 0 when SW_SCIF_CAN is set
> to 1 */
> > +#define SW_RSPI_CAN    0
> > +#else
> > +/* Please set SW_RSPI_CAN. Default value is 1 */
> > +#define SW_RSPI_CAN    1
> > +#endif
> > +
> > +#if (SW_SCIF_CAN & SW_RSPI_CAN)
> > +#error "Can not set 1 to both SW_SCIF_CAN and SW_RSPI_CAN due to HW
> routing"
> > +#endif
> 
> Would it make sense to have a macro for SW_SD0_DEV_SEL, too, or is there a
> special reason to keep the separate EMMC and SDHI macros?

I will send a follow up patch for replacing EMMC and SDHI macros with SW_SD0_DEV_SEL

Regards,
Biju




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