> On 01/12/2022 9:44 AM Geert Uytterhoeven <geert@xxxxxxxxxxxxxx> wrote:
> Thanks for your patch!
>
> > --- a/drivers/clk/renesas/r8a779a0-cpg-mssr.c
> > +++ b/drivers/clk/renesas/r8a779a0-cpg-mssr.c
> > @@ -136,6 +136,7 @@ static const struct mssr_mod_clk r8a779a0_mod_clks[] __initconst = {
> > DEF_MOD("avb3", 214, R8A779A0_CLK_S3D2),
> > DEF_MOD("avb4", 215, R8A779A0_CLK_S3D2),
> > DEF_MOD("avb5", 216, R8A779A0_CLK_S3D2),
> > + DEF_MOD("canfd0", 328, R8A779A0_CLK_CANFD),
>
> The datasheet calls this "canfd".
>
> > DEF_MOD("csi40", 331, R8A779A0_CLK_CSI0),
> > DEF_MOD("csi41", 400, R8A779A0_CLK_CSI0),
> > DEF_MOD("csi42", 401, R8A779A0_CLK_CSI0),
>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
> i.e. will queue in renesas-clk-for-v5.18 with the above fixed.
Don't do that! There already is a DIV4 clock called "canfd", and using that name twice breaks stuff. The BSP calls this clock "can-fd" for that reason.
CU
Uli
