Re: [PATCH 3/3] arm64: dts: renesas: Add initial device tree for RZ/G2LC SMARC EVK

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Hi Biju,

On Mon, Jan 10, 2022 at 6:28 PM Biju Das <biju.das.jz@xxxxxxxxxxxxxx> wrote:
>
> Hi Geert,
>
> Thanks for the feedback.
>
> > Subject: Re: [PATCH 3/3] arm64: dts: renesas: Add initial device tree for
> > RZ/G2LC SMARC EVK
> >
> > Hi Biju,
> >
> > On Thu, Dec 16, 2021 at 12:43 PM Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> > wrote:
> > > Add basic support for RZ/G2LC SMARC EVK (based on R9A07G044C2):
> > > - memory
> > > - External input clock
> > > - SCIF
> > > - GbEthernet
> > > - Audio Clock
> > >
> > > It shares the same carrier board with RZ/G2L, but the pin mapping is
> > > different. Disable the device nodes which is not tested and delete the
> > > corresponding pinctrl definitions.
> > >
> > > Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> > > Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> >
> > Thanks for your patch!
> >
> > Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
> >
> > Before I queue this in renesas-devel for v5.18, I have two questions:
> >
> > > --- /dev/null
> > > +++ b/arch/arm64/boot/dts/renesas/r9a07g044c2-smarc.dts
> > > @@ -0,0 +1,99 @@
> > > +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > > +/*
> > > + * Device Tree Source for the RZ/G2LC SMARC EVK board
> > > + *
> > > + * Copyright (C) 2021 Renesas Electronics Corp.
> > > + */
> > > +
> > > +/dts-v1/;
> > > +#include "r9a07g044c2.dtsi"
> > > +#include "rzg2lc-smarc-som.dtsi"
> > > +#include "rzg2lc-smarc-pinfunction.dtsi"
> >
> > 1) So far it looks like the definitions in rzg2lc-smarc-pinfunction.dtsi
> >    do not really differ from those in rzg2l-smarc-pinfunction.dtsi,\
> >    there are just less. Will there be other differences?
>
> SoM module contains below SW for multiplex function. Same pins used for both operations.
>
> SW1-3 : 1:CAN1, 0:SCIF1
> SW1-4 : 1:CAN1, 0:RSPI1
> SW1-5 : 1:I2S2 HDMI Audio, 0:I2S0 Audio code
>
> Apart from this, there are differences w.r.to
> 1) PMOD pins
> 2) SD0 power enable and SD0_DEV_SEL
> 3) IIC3
> 4) Only CAN1 and ETH0.

OK, so let's go as you proposed.

> > 2) Would it make sense to create rzg2*-smarc-som-pinfunction.dtsi
> >    files, too?
>
> Only ADC, Ethernet and SD0/eMMC are defined on SoM.
>
> Between RZ/G2L and RZ/G2LC, ADC is not present on LC
> And SD0 pins are different between this as mentioned above.
>
> Only ethernet(eth0) is common, but that also different in RZ/G2UL.
> That is the reason it is not done.
>
> If there is a value in adding, rzg2*-smarc-som-pinfunction.dtsi, I can create
> rzg2*-smarc-som-pinfunction.dtsi files.
>
> Please let me know.

Thanks, it's fine as-is.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds



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