Hi Daniel Lezcano,
Thanks for the feedback.
> Subject: Re: [PATCH v3 3/4] clocksource/drivers/renesas-ostm: Add RZ/G2L
> OSTM support
>
> On 12/11/2021 19:44, Biju Das wrote:
> > RZ/G2L SoC has Generic Timer Module(a.k.a OSTM) which needs to
> > deassert the reset line before accessing any registers.
> >
> > This patch adds an entry point for RZ/G2L so that we can deassert the
> > reset line in probe callback.
>
> What is the connection between adding the reset line control and the
> platform driver at the end of the driver ?
The original driver has no arm architecture timer, so it needs to be
called very early in the boot and using of calls for handling the clocks.
Where as RZ/G2L has arm architecture timer and it needs to release the module
Reset before accessing any registers. So it has to be built in and it needs cpg driver
which happens at later stage compared to the original case, for de-asserting the reset.
Geert, please correct me if I am wrong.
Regards,
Biju
>
> > Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> > Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> > ---
> > v2->v3:
> > * Added reset_control_put() on error path.
> > * enabled suppress_bind_attrs in ostm_device_driver structure
> > v1->v2:
> > * Added reset handling inside ostm_init
> > * Used same compatible for builtin driver aswell
> > ---
> > drivers/clocksource/renesas-ostm.c | 39
> > +++++++++++++++++++++++++++++-
> > 1 file changed, 38 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/clocksource/renesas-ostm.c
> > b/drivers/clocksource/renesas-ostm.c
> > index 3d06ba66008c..21d1392637b8 100644
> > --- a/drivers/clocksource/renesas-ostm.c
> > +++ b/drivers/clocksource/renesas-ostm.c
> > @@ -9,6 +9,8 @@
> > #include <linux/clk.h>
> > #include <linux/clockchips.h>
> > #include <linux/interrupt.h>
> > +#include <linux/platform_device.h>
> > +#include <linux/reset.h>
> > #include <linux/sched_clock.h>
> > #include <linux/slab.h>
> >
> > @@ -159,6 +161,7 @@ static int __init ostm_init_clkevt(struct timer_of
> > *to)
> >
> > static int __init ostm_init(struct device_node *np) {
> > + struct reset_control *rstc;
> > struct timer_of *to;
> > int ret;
> >
> > @@ -166,6 +169,14 @@ static int __init ostm_init(struct device_node *np)
> > if (!to)
> > return -ENOMEM;
> >
> > + rstc = of_reset_control_get_optional_exclusive(np, NULL);
> > + if (IS_ERR(rstc)) {
> > + ret = PTR_ERR(rstc);
> > + goto err_free;
> > + }
> > +
> > + reset_control_deassert(rstc);
> > +
> > to->flags = TIMER_OF_BASE | TIMER_OF_CLOCK;
> > if (system_clock) {
> > /*
> > @@ -178,7 +189,7 @@ static int __init ostm_init(struct device_node
> > *np)
> >
> > ret = timer_of_init(np, to);
> > if (ret)
> > - goto err_free;
> > + goto err_reset;
> >
> > /*
> > * First probed device will be used as system clocksource. Any @@
> > -203,9 +214,35 @@ static int __init ostm_init(struct device_node *np)
> >
> > err_cleanup:
> > timer_of_cleanup(to);
> > +err_reset:
> > + reset_control_assert(rstc);
> > + reset_control_put(rstc);
> > err_free:
> > kfree(to);
> > return ret;
> > }
> >
> > TIMER_OF_DECLARE(ostm, "renesas,ostm", ostm_init);
> > +
> > +#ifdef CONFIG_ARCH_R9A07G044
> > +static int __init ostm_probe(struct platform_device *pdev) {
> > + struct device *dev = &pdev->dev;
> > +
> > + return ostm_init(dev->of_node);
> > +}
> > +
> > +static const struct of_device_id ostm_of_table[] = {
> > + { .compatible = "renesas,ostm", },
> > + { /* sentinel */ }
> > +};
> > +
> > +static struct platform_driver ostm_device_driver = {
> > + .driver = {
> > + .name = "renesas_ostm",
> > + .of_match_table = of_match_ptr(ostm_of_table),
> > + .suppress_bind_attrs = true,
> > + },
> > +};
> > +builtin_platform_driver_probe(ostm_device_driver, ostm_probe); #endif
> >
>
>
> --
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