This patch series aims to add OPP table for RZ/G2L SoC. Supported frequencies are 1.2GHz, 600MHz, 300MHz and 150MHz. V1->v2: * Fixed typo cluster1_opp->cluster0_opp Biju Das (4): clk: renesas: rzg2l: Add CPG_PL1_DDIV macro clk: renesas: r9a07g044: Change core clock "I" from DEF_FIXED->DEF_DIV arm64: dts: renesas: r9a07g044: Sort psci node arm64: dts: renesas: r9a07g044: Add OPP table arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 36 ++++++++++++++++++++-- drivers/clk/renesas/r9a07g044-cpg.c | 11 ++++++- drivers/clk/renesas/rzg2l-cpg.h | 2 ++ 3 files changed, 45 insertions(+), 4 deletions(-) -- 2.17.1