RE: [PATCH net-next v3 13/14] ravb: Update ravb_emac_init_gbeth()

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Hi Sergey,

> Subject: Re: [PATCH net-next v3 13/14] ravb: Update ravb_emac_init_gbeth()
> 
> On 10/12/21 8:52 PM, Biju Das wrote:
> 
> >>> This patch enables Receive/Transmit port of TOE and removes the
> >>> setting of promiscuous bit from EMAC configuration mode register.
> >>>
> >>> This patch also update EMAC configuration mode comment from "PAUSE
> >>> prohibition" to "EMAC Mode: PAUSE prohibition; Duplex; TX; RX; CRC
> >>> Pass Through".
> >>
> >>    I'm not sure why you set ECMR.RCPT while you don't have the
> >> checksum offloaded...
> >>
> >>> Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> >>> ---
> >>> v2->v3:
> >>>  * Enabled TPE/RPE of TOE, as disabling causes loopback test to fail
> >>>  * Documented CSR0 register bits
> >>>  * Removed PRM setting from EMAC configuration mode
> >>>  * Updated EMAC configuration mode.
> >>> v1->v2:
> >>>  * No change
> >>> V1:
> >>>  * New patch.
> >>> ---
> >>>  drivers/net/ethernet/renesas/ravb.h      | 6 ++++++
> >>>  drivers/net/ethernet/renesas/ravb_main.c | 5 +++--
> >>>  2 files changed, 9 insertions(+), 2 deletions(-)
> >>>
> >>> diff --git a/drivers/net/ethernet/renesas/ravb.h
> >>> b/drivers/net/ethernet/renesas/ravb.h
> >>> index 69a771526776..08062d73df10 100644
> >>> --- a/drivers/net/ethernet/renesas/ravb.h
> >>> +++ b/drivers/net/ethernet/renesas/ravb.h
> >>> @@ -204,6 +204,7 @@ enum ravb_reg {
> >>>  	TLFRCR	= 0x0758,
> >>>  	RFCR	= 0x0760,
> >>>  	MAFCR	= 0x0778,
> >>> +	CSR0    = 0x0800,	/* RZ/G2L only */
> >>>  };
> >>>
> >>>
> >>> @@ -964,6 +965,11 @@ enum CXR31_BIT {
> >>>  	CXR31_SEL_LINK1	= 0x00000008,
> >>>  };
> >>>
> >>> +enum CSR0_BIT {
> >>> +	CSR0_TPE	= 0x00000010,
> >>> +	CSR0_RPE	= 0x00000020,
> >>> +};
> >>> +
> >>
> >>   Is this really needed if you have ECMR.RCPT cleared?
> >
> > Yes it is required. Please see the current log and log with the
> > changes you suggested
> >
> > root@smarc-rzg2l:/rzg2l-test-scripts# ./eth_t_001.sh
> > [   39.646891] ravb 11c20000.ethernet eth0: Link is Down
> > [   39.715127] ravb 11c30000.ethernet eth1: Link is Down
> > [   39.895680] Microchip KSZ9131 Gigabit PHY 11c20000.ethernet-
> ffffffff:07: attached PHY driver (mii_bus:phy_addr=11c20000.ethernet-
> ffffffff:07, irq=POLL)
> > [   39.966370] Microchip KSZ9131 Gigabit PHY 11c30000.ethernet-
> ffffffff:07: attached PHY driver (mii_bus:phy_addr=11c30000.ethernet-
> ffffffff:07, irq=POLL)
> > [   42.988573] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready
> > [   42.995119] ravb 11c20000.ethernet eth0: Link is Up - 1Gbps/Full -
> flow control off
> > [   43.052541] IPv6: ADDRCONF(NETDEV_CHANGE): eth1: link becomes ready
> > [   43.055710] ravb 11c30000.ethernet eth1: Link is Up - 1Gbps/Full -
> flow control off
> >
> > EXIT|PASS||[422391:43:00] ||
> >
> > root@smarc-rzg2l:/rzg2l-test-scripts#
> >
> >
> > with the changes you suggested
> > ----------------------------
> >
> > root@smarc-rzg2l:/rzg2l-test-scripts# ./eth_t_001.sh
> > [   23.300520] ravb 11c20000.ethernet eth0: Link is Down
> > [   23.535604] ravb 11c30000.ethernet eth1: device will be stopped after
> h/w processes are done.
> > [   23.547267] ravb 11c30000.ethernet eth1: Link is Down
> > [   23.802667] Microchip KSZ9131 Gigabit PHY 11c20000.ethernet-
> ffffffff:07: attached PHY driver (mii_bus:phy_addr=11c20000.ethernet-
> ffffffff:07, irq=POLL)
> > [   24.031711] ravb 11c30000.ethernet eth1: failed to switch device to
> config mode
> > RTNETLINK answers: Connection timed out
> >
> > EXIT|FAIL||[422391:42:32] Failed to bring up ETH1||
> >
> > root@smarc-rzg2l:/rzg2l-test-scripts#
> 
>    Hm... :-/
>    What if you only clear ECMR.RCPT but continue to set CSR0?

We already seen, RCPT=0, RCSC=1 with similar Hardware checksum function like R-Car,
System crashes.

Regards,
Biju

> 
> MBR, Sergey




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