Hi Biju-san, Thank you for the patch! > From: Biju Das, Sent: Monday, June 21, 2021 6:40 PM > > This patch adds OTG support for RZ/G2L SoC. > > RZ/G2L USB2.0 phy is compatible with rcar gen3, but it uses > line ctrl register for OTG_ID pin changes. Apart from this > it uses a different OTG-BC interrupt bit for device recognition. > > Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx> > Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx> > --- > drivers/phy/renesas/phy-rcar-gen3-usb2.c | 63 ++++++++++++++++++------ > 1 file changed, 48 insertions(+), 15 deletions(-) > > diff --git a/drivers/phy/renesas/phy-rcar-gen3-usb2.c b/drivers/phy/renesas/phy-rcar-gen3-usb2.c > index fbc55232120e..aff0749be65d 100644 > --- a/drivers/phy/renesas/phy-rcar-gen3-usb2.c > +++ b/drivers/phy/renesas/phy-rcar-gen3-usb2.c <snip> > @@ -627,6 +653,7 @@ static int rcar_gen3_phy_usb2_probe(struct platform_device *pdev) > if (IS_ERR(channel->base)) > return PTR_ERR(channel->base); > > + channel->obint_enable_bits = USB2_OBINT_SESSVLDCHG | USB2_OBINT_IDDIGCHG; Please use USB2_OBINT_BITS instead of USB2_OBINT_SESSVLDCHG | USB2_OBINT_IDDIGCHG. Sorry, I thought we needed more update when I sent an email before, but I have this comment only now. Best regards, Yoshihiro Shimoda
