Add clock entries for USB{0,1}.
Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
---
drivers/clk/renesas/r9a07g044-cpg.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/clk/renesas/r9a07g044-cpg.c b/drivers/clk/renesas/r9a07g044-cpg.c
index 04123908511c..2d2bc78b84a2 100644
--- a/drivers/clk/renesas/r9a07g044-cpg.c
+++ b/drivers/clk/renesas/r9a07g044-cpg.c
@@ -88,6 +88,12 @@ static struct rzg2l_mod_clk r9a07g044_mod_clks[] = {
DEF_MOD("dmac", R9A07G044_CLK_DMAC,
R9A07G044_CLK_P1,
0x52c, (BIT(0) | BIT(1)), (BIT(0) | BIT(1))),
+ DEF_MOD("usb0", R9A07G044_CLK_USB0,
+ R9A07G044_CLK_P1,
+ 0x578, (BIT(0) | BIT(2) | BIT(3)), (BIT(0) | BIT(2) | BIT(3))),
+ DEF_MOD("usb1", R9A07G044_CLK_USB1,
+ R9A07G044_CLK_P1,
+ 0x578, (BIT(1) | BIT(3)), (BIT(1) | BIT(3))),
DEF_MOD("scif0", R9A07G044_CLK_SCIF0,
R9A07G044_CLK_P0,
0x584, BIT(0), BIT(0)),
--
2.17.1
