Re: [PATCH] clk: renesas: r9a06g032: Switch to .determine_rate()

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Quoting Geert Uytterhoeven (2021-04-01 06:03:24)
> diff --git a/drivers/clk/renesas/r9a06g032-clocks.c b/drivers/clk/renesas/r9a06g032-clocks.c
> index 71b11443f6fc3801..c99942f0e4d4c751 100644
> --- a/drivers/clk/renesas/r9a06g032-clocks.c
> +++ b/drivers/clk/renesas/r9a06g032-clocks.c
> @@ -630,11 +629,13 @@ r9a06g032_div_round_rate(struct clk_hw *hw,
>         if (clk->index == R9A06G032_DIV_UART ||
>             clk->index == R9A06G032_DIV_P2_PG) {
>                 pr_devel("%s div uart hack!\n", __func__);
> -               return clk_get_rate(hw->clk);
> +               req->rate = clk_get_rate(hw->clk);

Can this use clk_hw_get_rate()? Or it needs to be clk_get_rate() to make
sure the rate doesn't change while querying the framework... from the
framework? Another patch is preferred if you're interested in making the
change.

> +               return 0;
>         }
> +       req->rate = DIV_ROUND_UP(req->best_parent_rate, div);
>         pr_devel("%s %pC %ld / %u = %ld\n", __func__, hw->clk,
> -                *prate, div, DIV_ROUND_UP(*prate, div));
> -       return DIV_ROUND_UP(*prate, div);
> +                req->best_parent_rate, div, req->rate);
> +       return 0;
>  }
>  
>  static int




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