Hi Julien,
On Thu, Dec 10, 2020 at 4:17 PM Julien Massot <julien.massot@xxxxxxx> wrote:
> On 12/10/20 3:57 PM, Biju Das wrote:
> >> Subject: [PATCH 0/5] clk: renesas: Add MFIS clock
> >>
> >> This series adds the missing MFIS clocks for most Reneas R-Car Gen3 SoCs.
> >> I have tested this series on E3, M3, and H3 based boards, I don't have
> >> access to D3 nor V3 boards.
> >
> > Just a question, Can you explain what test have you done with MFIS module?
> A basic usage I did is to store and read a byte into one of the
> communication register MFISARIICR / MFISAREMBR, a more complex usage is
> to trigger interrupts between Linux and the realtime processor, using a
> mailbox driver, that I didn't post yet.
Thanks for your series!
Is it OK if I postpone applying this (possibly squashed into a single commit)
until you have posted an MFIS driver?
Thanks, and have a nice weekend!
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
