Hi Geert,
Unfortunately this information isn't always properly documented in the Hardware User's Manual. Based on the MFIS Block Diagram, I would say it must be one of the APB bus clocks. The BSP uses R8A77970_CLK_S2D2 for R-Car V3M, which sounds reasonable. Reading the PCIe chapter, it could also be S3D1 or S3D3. However, in this case, the driver wouldn't care about the clock rate, so the actual parent clock used doesn't matter much. Hence S2D2 sounds acceptable to me.
Many thanks, let's put S2D2 then, patches are in flight ! Regards, -- Julien Massot [IoT.bzh]
