Parent clock for MFIS module

[Julien Massot <julien.massot@xxxxxxx>]

Hi,
I did a linux driver which makes use of the MFIS module, and so my first 
step would be to send a patch to add the MFIS module clock, which will 
basically do that:

--- a/drivers/clk/renesas/r8a7795-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c
@@ -137,6 +137,7 @@ static struct mssr_mod_clk r8a7795_mod_clks[] 
__initdata = {
 	DEF_MOD("msiof2",		 209,	R8A7795_CLK_MSO),
 	DEF_MOD("msiof1",		 210,	R8A7795_CLK_MSO),
 	DEF_MOD("msiof0",		 211,	R8A7795_CLK_MSO),
+	DEF_MOD("mfis",		         213,	R8A7795_CLK_MSO),
 	DEF_MOD("sys-dmac2",		 217,	R8A7795_CLK_S3D1),

But the third parameter of DEF_MOD is definitely wrong and despite 
having read the hardware manual I can't figure out where this 
information is. Does someone have any hint on where to find the parent 
clock for the mfis mod clock ?

Thanks,
Julien