There is no reason to keep on using the __raw_{read,write}l() I/O
accessors in Renesas ARM platform code. Switch to using the plain
{read,write}l() I/O accessors, to have a chance that this works on
big-endian.
Suggested-by: Arnd Bergmann <arnd@xxxxxxxxxx>
Signed-off-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
---
To be queued in renesas-devel for v5.11.
arch/arm/mach-shmobile/platsmp-scu.c | 2 +-
arch/arm/mach-shmobile/setup-r8a7778.c | 8 ++++----
arch/arm/mach-shmobile/setup-r8a7779.c | 14 +++++++-------
arch/arm/mach-shmobile/smp-r8a7779.c | 2 +-
arch/arm/mach-shmobile/smp-sh73a0.c | 10 +++++-----
5 files changed, 18 insertions(+), 18 deletions(-)
diff --git a/arch/arm/mach-shmobile/platsmp-scu.c b/arch/arm/mach-shmobile/platsmp-scu.c
index fcfcef1d1ae4f81f..3849f71e6e12eba6 100644
--- a/arch/arm/mach-shmobile/platsmp-scu.c
+++ b/arch/arm/mach-shmobile/platsmp-scu.c
@@ -64,7 +64,7 @@ static int shmobile_smp_scu_psr_core_disabled(int cpu)
{
unsigned long mask = SCU_PM_POWEROFF << (cpu * 8);
- if ((__raw_readl(shmobile_scu_base + 8) & mask) == mask)
+ if ((readl(shmobile_scu_base + 8) & mask) == mask)
return 1;
return 0;
diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c
index 819dbda47298ae88..02cda9cada4c4546 100644
--- a/arch/arm/mach-shmobile/setup-r8a7778.c
+++ b/arch/arm/mach-shmobile/setup-r8a7778.c
@@ -31,12 +31,12 @@ static void __init r8a7778_init_irq_dt(void)
irqchip_init();
/* route all interrupts to ARM */
- __raw_writel(0x73ffffff, base + INT2NTSR0);
- __raw_writel(0xffffffff, base + INT2NTSR1);
+ writel(0x73ffffff, base + INT2NTSR0);
+ writel(0xffffffff, base + INT2NTSR1);
/* unmask all known interrupts in INTCS2 */
- __raw_writel(0x08330773, base + INT2SMSKCR0);
- __raw_writel(0x00311110, base + INT2SMSKCR1);
+ writel(0x08330773, base + INT2SMSKCR0);
+ writel(0x00311110, base + INT2SMSKCR1);
iounmap(base);
}
diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c
index 446d40b50b7b784b..b6e282116d664705 100644
--- a/arch/arm/mach-shmobile/setup-r8a7779.c
+++ b/arch/arm/mach-shmobile/setup-r8a7779.c
@@ -34,15 +34,15 @@ static void __init r8a7779_init_irq_dt(void)
irqchip_init();
/* route all interrupts to ARM */
- __raw_writel(0xffffffff, base + INT2NTSR0);
- __raw_writel(0x3fffffff, base + INT2NTSR1);
+ writel(0xffffffff, base + INT2NTSR0);
+ writel(0x3fffffff, base + INT2NTSR1);
/* unmask all known interrupts in INTCS2 */
- __raw_writel(0xfffffff0, base + INT2SMSKCR0);
- __raw_writel(0xfff7ffff, base + INT2SMSKCR1);
- __raw_writel(0xfffbffdf, base + INT2SMSKCR2);
- __raw_writel(0xbffffffc, base + INT2SMSKCR3);
- __raw_writel(0x003fee3f, base + INT2SMSKCR4);
+ writel(0xfffffff0, base + INT2SMSKCR0);
+ writel(0xfff7ffff, base + INT2SMSKCR1);
+ writel(0xfffbffdf, base + INT2SMSKCR2);
+ writel(0xbffffffc, base + INT2SMSKCR3);
+ writel(0x003fee3f, base + INT2SMSKCR4);
iounmap(base);
}
diff --git a/arch/arm/mach-shmobile/smp-r8a7779.c b/arch/arm/mach-shmobile/smp-r8a7779.c
index 80fef14a47ba6b7e..51163854d9a14d17 100644
--- a/arch/arm/mach-shmobile/smp-r8a7779.c
+++ b/arch/arm/mach-shmobile/smp-r8a7779.c
@@ -45,7 +45,7 @@ static void __init r8a7779_smp_prepare_cpus(unsigned int max_cpus)
void __iomem *base = ioremap(HPBREG_BASE, 0x1000);
/* Map the reset vector (in headsmp-scu.S, headsmp.S) */
- __raw_writel(__pa(shmobile_boot_vector), base + AVECR);
+ writel(__pa(shmobile_boot_vector), base + AVECR);
/* setup r8a7779 specific SCU bits */
shmobile_smp_scu_prepare_cpus(R8A7779_SCU_BASE, max_cpus);
diff --git a/arch/arm/mach-shmobile/smp-sh73a0.c b/arch/arm/mach-shmobile/smp-sh73a0.c
index 916f6367bc282eb4..62f4d2501e174a78 100644
--- a/arch/arm/mach-shmobile/smp-sh73a0.c
+++ b/arch/arm/mach-shmobile/smp-sh73a0.c
@@ -39,10 +39,10 @@ static int sh73a0_boot_secondary(unsigned int cpu, struct task_struct *idle)
unsigned int lcpu = cpu_logical_map(cpu);
void __iomem *cpg2 = ioremap(CPG_BASE2, PAGE_SIZE);
- if (((__raw_readl(cpg2 + PSTR) >> (4 * lcpu)) & 3) == 3)
- __raw_writel(1 << lcpu, cpg2 + WUPCR); /* wake up */
+ if (((readl(cpg2 + PSTR) >> (4 * lcpu)) & 3) == 3)
+ writel(1 << lcpu, cpg2 + WUPCR); /* wake up */
else
- __raw_writel(1 << lcpu, cpg2 + SRESCR); /* reset */
+ writel(1 << lcpu, cpg2 + SRESCR); /* reset */
iounmap(cpg2);
return 0;
}
@@ -53,8 +53,8 @@ static void __init sh73a0_smp_prepare_cpus(unsigned int max_cpus)
void __iomem *sysc = ioremap(SYSC_BASE, PAGE_SIZE);
/* Map the reset vector (in headsmp.S) */
- __raw_writel(0, ap + APARMBAREA); /* 4k */
- __raw_writel(__pa(shmobile_boot_vector), sysc + SBAR);
+ writel(0, ap + APARMBAREA); /* 4k */
+ writel(__pa(shmobile_boot_vector), sysc + SBAR);
iounmap(sysc);
iounmap(ap);
--
2.25.1
