Hi Wolfram, Thanks for your work. On 2020-11-11 11:02:43 +0100, Wolfram Sang wrote: > Use a macro to name the hardcoded values. Also, move the SDIF register > definition into the SDHI driver because this is an SDHI extension. > > Signed-off-by: Wolfram Sang <wsa+renesas@xxxxxxxxxxxxxxxxxxxx> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@xxxxxxxxxxxx> > --- > drivers/mmc/host/renesas_sdhi_core.c | 7 +++++-- > drivers/mmc/host/tmio_mmc.h | 1 - > 2 files changed, 5 insertions(+), 3 deletions(-) > > diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c > index b3eb0182c4af..55633826d38c 100644 > --- a/drivers/mmc/host/renesas_sdhi_core.c > +++ b/drivers/mmc/host/renesas_sdhi_core.c > @@ -49,6 +49,9 @@ > #define HOST_MODE_GEN3_32BIT (HOST_MODE_GEN3_WMODE | HOST_MODE_GEN3_BUSWIDTH) > #define HOST_MODE_GEN3_64BIT 0 > > +#define CTL_SDIF_MODE 0xe6 > +#define SDIF_MODE_HS400 BIT(0) > + > #define SDHI_VER_GEN2_SDR50 0x490c > #define SDHI_VER_RZ_A1 0x820b > /* very old datasheets said 0x490c for SDR104, too. They are wrong! */ > @@ -381,7 +384,7 @@ static void renesas_sdhi_hs400_complete(struct mmc_host *mmc) > sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL)); > > /* Set HS400 mode */ > - sd_ctrl_write16(host, CTL_SDIF_MODE, 0x0001 | > + sd_ctrl_write16(host, CTL_SDIF_MODE, SDIF_MODE_HS400 | > sd_ctrl_read16(host, CTL_SDIF_MODE)); > > sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_DT2FF, > @@ -529,7 +532,7 @@ static void renesas_sdhi_reset_hs400_mode(struct tmio_mmc_host *host, > sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL)); > > /* Reset HS400 mode */ > - sd_ctrl_write16(host, CTL_SDIF_MODE, ~0x0001 & > + sd_ctrl_write16(host, CTL_SDIF_MODE, ~SDIF_MODE_HS400 & > sd_ctrl_read16(host, CTL_SDIF_MODE)); > > sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_DT2FF, priv->scc_tappos); > diff --git a/drivers/mmc/host/tmio_mmc.h b/drivers/mmc/host/tmio_mmc.h > index 9546e542619c..7ff41185896a 100644 > --- a/drivers/mmc/host/tmio_mmc.h > +++ b/drivers/mmc/host/tmio_mmc.h > @@ -42,7 +42,6 @@ > #define CTL_DMA_ENABLE 0xd8 > #define CTL_RESET_SD 0xe0 > #define CTL_VERSION 0xe2 > -#define CTL_SDIF_MODE 0xe6 > > /* Definitions for values the CTL_STOP_INTERNAL_ACTION register can take */ > #define TMIO_STOP_STP BIT(0) > -- > 2.28.0 > -- Regards, Niklas Söderlund
