Ensures RWDT remains alert throughout the boot process if enabled.
This patch applies the change to the following SoCs: r8a7795,
r8a7796, r8a77965, r8a77970, r8a77980, r8a77990 and r8a77995.
Signed-off-by: Ulrich Hecht <uli+renesas@xxxxxxxx>
---
drivers/clk/renesas/r8a7795-cpg-mssr.c | 6 +++++-
drivers/clk/renesas/r8a7796-cpg-mssr.c | 6 +++++-
drivers/clk/renesas/r8a77965-cpg-mssr.c | 5 +++++
drivers/clk/renesas/r8a77970-cpg-mssr.c | 6 +++++-
drivers/clk/renesas/r8a77980-cpg-mssr.c | 6 +++++-
drivers/clk/renesas/r8a77990-cpg-mssr.c | 5 +++++
drivers/clk/renesas/r8a77995-cpg-mssr.c | 6 +++++-
7 files changed, 35 insertions(+), 5 deletions(-)
diff --git a/drivers/clk/renesas/r8a7795-cpg-mssr.c b/drivers/clk/renesas/r8a7795-cpg-mssr.c
index ff5b302..3d055cb 100644
--- a/drivers/clk/renesas/r8a7795-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c
@@ -289,7 +289,9 @@ static struct mssr_mod_clk r8a7795_mod_clks[] __initdata = {
static const unsigned int r8a7795_crit_mod_clks[] __initconst = {
MOD_CLK_ID(408), /* INTC-AP (GIC) */
};
-
+static const unsigned int r8a7795_never_disable_mod_clks[] __initconst = {
+ MOD_CLK_ID(402), /* RWDT */
+};
/*
* CPG Clock Data
@@ -484,6 +486,8 @@ const struct cpg_mssr_info r8a7795_cpg_mssr_info __initconst = {
/* Critical Module Clocks */
.crit_mod_clks = r8a7795_crit_mod_clks,
.num_crit_mod_clks = ARRAY_SIZE(r8a7795_crit_mod_clks),
+ .never_disable_mod_clks = r8a7795_never_disable_mod_clks,
+ .num_never_disable_mod_clks = ARRAY_SIZE(r8a7795_never_disable_mod_clks),
/* Callbacks */
.init = r8a7795_cpg_mssr_init,
diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c
index e8d466d..77160ba 100644
--- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
@@ -264,7 +264,9 @@ static struct mssr_mod_clk r8a7796_mod_clks[] __initdata = {
static const unsigned int r8a7796_crit_mod_clks[] __initconst = {
MOD_CLK_ID(408), /* INTC-AP (GIC) */
};
-
+static const unsigned int r8a7796_never_disable_mod_clks[] __initconst = {
+ MOD_CLK_ID(402), /* RWDT */
+};
/*
* CPG Clock Data
@@ -364,6 +366,8 @@ const struct cpg_mssr_info r8a7796_cpg_mssr_info __initconst = {
/* Critical Module Clocks */
.crit_mod_clks = r8a7796_crit_mod_clks,
.num_crit_mod_clks = ARRAY_SIZE(r8a7796_crit_mod_clks),
+ .never_disable_mod_clks = r8a7796_never_disable_mod_clks,
+ .num_never_disable_mod_clks = ARRAY_SIZE(r8a7796_never_disable_mod_clks),
/* Callbacks */
.init = r8a7796_cpg_mssr_init,
diff --git a/drivers/clk/renesas/r8a77965-cpg-mssr.c b/drivers/clk/renesas/r8a77965-cpg-mssr.c
index 7a05a2f..d09ac5e 100644
--- a/drivers/clk/renesas/r8a77965-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a77965-cpg-mssr.c
@@ -265,6 +265,9 @@ static const struct mssr_mod_clk r8a77965_mod_clks[] __initconst = {
static const unsigned int r8a77965_crit_mod_clks[] __initconst = {
MOD_CLK_ID(408), /* INTC-AP (GIC) */
};
+static const unsigned int r8a77965_never_disable_mod_clks[] __initconst = {
+ MOD_CLK_ID(402), /* RWDT */
+};
/*
* CPG Clock Data
@@ -350,6 +353,8 @@ const struct cpg_mssr_info r8a77965_cpg_mssr_info __initconst = {
/* Critical Module Clocks */
.crit_mod_clks = r8a77965_crit_mod_clks,
.num_crit_mod_clks = ARRAY_SIZE(r8a77965_crit_mod_clks),
+ .never_disable_mod_clks = r8a77965_never_disable_mod_clks,
+ .num_never_disable_mod_clks = ARRAY_SIZE(r8a77965_never_disable_mod_clks),
/* Callbacks */
.init = r8a77965_cpg_mssr_init,
diff --git a/drivers/clk/renesas/r8a77970-cpg-mssr.c b/drivers/clk/renesas/r8a77970-cpg-mssr.c
index cbed376..3a18499 100644
--- a/drivers/clk/renesas/r8a77970-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a77970-cpg-mssr.c
@@ -167,7 +167,9 @@ static const struct mssr_mod_clk r8a77970_mod_clks[] __initconst = {
static const unsigned int r8a77970_crit_mod_clks[] __initconst = {
MOD_CLK_ID(408), /* INTC-AP (GIC) */
};
-
+static const unsigned int r8a77970_never_disable_mod_clks[] __initconst = {
+ MOD_CLK_ID(402), /* RWDT */
+};
/*
* CPG Clock Data
@@ -267,6 +269,8 @@ const struct cpg_mssr_info r8a77970_cpg_mssr_info __initconst = {
/* Critical Module Clocks */
.crit_mod_clks = r8a77970_crit_mod_clks,
.num_crit_mod_clks = ARRAY_SIZE(r8a77970_crit_mod_clks),
+ .never_disable_mod_clks = r8a77970_never_disable_mod_clks,
+ .num_never_disable_mod_clks = ARRAY_SIZE(r8a77970_never_disable_mod_clks),
/* Callbacks */
.init = r8a77970_cpg_mssr_init,
diff --git a/drivers/clk/renesas/r8a77980-cpg-mssr.c b/drivers/clk/renesas/r8a77980-cpg-mssr.c
index 7227f67..eeb2377 100644
--- a/drivers/clk/renesas/r8a77980-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a77980-cpg-mssr.c
@@ -182,7 +182,9 @@ static const struct mssr_mod_clk r8a77980_mod_clks[] __initconst = {
static const unsigned int r8a77980_crit_mod_clks[] __initconst = {
MOD_CLK_ID(408), /* INTC-AP (GIC) */
};
-
+static const unsigned int r8a77980_never_disable_mod_clks[] __initconst = {
+ MOD_CLK_ID(402), /* RWDT */
+};
/*
* CPG Clock Data
@@ -238,6 +240,8 @@ const struct cpg_mssr_info r8a77980_cpg_mssr_info __initconst = {
/* Critical Module Clocks */
.crit_mod_clks = r8a77980_crit_mod_clks,
.num_crit_mod_clks = ARRAY_SIZE(r8a77980_crit_mod_clks),
+ .never_disable_mod_clks = r8a77980_never_disable_mod_clks,
+ .num_never_disable_mod_clks = ARRAY_SIZE(r8a77980_never_disable_mod_clks),
/* Callbacks */
.init = r8a77980_cpg_mssr_init,
diff --git a/drivers/clk/renesas/r8a77990-cpg-mssr.c b/drivers/clk/renesas/r8a77990-cpg-mssr.c
index 8eda2e3..daf7d63 100644
--- a/drivers/clk/renesas/r8a77990-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a77990-cpg-mssr.c
@@ -247,6 +247,9 @@ static const struct mssr_mod_clk r8a77990_mod_clks[] __initconst = {
static const unsigned int r8a77990_crit_mod_clks[] __initconst = {
MOD_CLK_ID(408), /* INTC-AP (GIC) */
};
+static const unsigned int r8a77990_never_disable_mod_clks[] __initconst = {
+ MOD_CLK_ID(402), /* RWDT */
+};
/*
* CPG Clock Data
@@ -296,6 +299,8 @@ const struct cpg_mssr_info r8a77990_cpg_mssr_info __initconst = {
/* Critical Module Clocks */
.crit_mod_clks = r8a77990_crit_mod_clks,
.num_crit_mod_clks = ARRAY_SIZE(r8a77990_crit_mod_clks),
+ .never_disable_mod_clks = r8a77990_never_disable_mod_clks,
+ .num_never_disable_mod_clks = ARRAY_SIZE(r8a77990_never_disable_mod_clks),
/* Callbacks */
.init = r8a77990_cpg_mssr_init,
diff --git a/drivers/clk/renesas/r8a77995-cpg-mssr.c b/drivers/clk/renesas/r8a77995-cpg-mssr.c
index 056ebf3..0a3c4d4 100644
--- a/drivers/clk/renesas/r8a77995-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a77995-cpg-mssr.c
@@ -185,7 +185,9 @@ static const struct mssr_mod_clk r8a77995_mod_clks[] __initconst = {
static const unsigned int r8a77995_crit_mod_clks[] __initconst = {
MOD_CLK_ID(408), /* INTC-AP (GIC) */
};
-
+static const unsigned int r8a77995_never_disable_mod_clks[] __initconst = {
+ MOD_CLK_ID(402), /* RWDT */
+};
/*
* CPG Clock Data
@@ -235,6 +237,8 @@ const struct cpg_mssr_info r8a77995_cpg_mssr_info __initconst = {
/* Critical Module Clocks */
.crit_mod_clks = r8a77995_crit_mod_clks,
.num_crit_mod_clks = ARRAY_SIZE(r8a77995_crit_mod_clks),
+ .never_disable_mod_clks = r8a77995_never_disable_mod_clks,
+ .num_never_disable_mod_clks = ARRAY_SIZE(r8a77995_never_disable_mod_clks),
/* Callbacks */
.init = r8a77995_cpg_mssr_init,
--
2.7.4
