[PATCH v3 1/3] clk: renesas: cpg-mssr: add support for never-disable clocks

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This adds facilities to mark clocks as never to be turned off. The primary
application is the RWDT clock, which needs to remain on throughout the boot
process if enabled by the bootloader.

Signed-off-by: Ulrich Hecht <uli+renesas@xxxxxxxx>
---
 drivers/clk/renesas/renesas-cpg-mssr.c | 10 ++++++++++
 drivers/clk/renesas/renesas-cpg-mssr.h |  9 +++++++++
 2 files changed, 19 insertions(+)

diff --git a/drivers/clk/renesas/renesas-cpg-mssr.c b/drivers/clk/renesas/renesas-cpg-mssr.c
index 8f6dff3..e234156 100644
--- a/drivers/clk/renesas/renesas-cpg-mssr.c
+++ b/drivers/clk/renesas/renesas-cpg-mssr.c
@@ -152,11 +152,13 @@ static struct cpg_mssr_priv *cpg_mssr_priv;
  * @hw: handle between common and hardware-specific interfaces
  * @index: MSTP clock number
  * @priv: CPG/MSSR private data
+ * @never_disable: clock shall never be disabled
  */
 struct mstp_clock {
 	struct clk_hw hw;
 	u32 index;
 	struct cpg_mssr_priv *priv;
+	bool never_disable;
 };
 
 #define to_mstp_clock(_hw) container_of(_hw, struct mstp_clock, hw)
@@ -175,6 +177,9 @@ static int cpg_mstp_clock_endisable(struct clk_hw *hw, bool enable)
 
 	dev_dbg(dev, "MSTP %u%02u/%pC %s\n", reg, bit, hw->clk,
 		enable ? "ON" : "OFF");
+	if (!enable && clock->never_disable)
+		return 0;
+
 	spin_lock_irqsave(&priv->rmw_lock, flags);
 
 	if (priv->stbyctrl) {
@@ -423,6 +428,11 @@ static void __init cpg_mssr_register_mod_clk(const struct mssr_mod_clk *mod,
 			init.flags |= CLK_IS_CRITICAL;
 			break;
 		}
+	for (i = 0; i < info->num_never_disable_mod_clks; i++)
+		if (id == info->never_disable_mod_clks[i]) {
+			clock->never_disable = true;
+			break;
+		}
 
 	parent_name = __clk_get_name(parent);
 	init.parent_names = &parent_name;
diff --git a/drivers/clk/renesas/renesas-cpg-mssr.h b/drivers/clk/renesas/renesas-cpg-mssr.h
index 55a18ef..654d3a789 100644
--- a/drivers/clk/renesas/renesas-cpg-mssr.h
+++ b/drivers/clk/renesas/renesas-cpg-mssr.h
@@ -105,6 +105,11 @@ struct device_node;
      * @crit_mod_clks: Array with Module Clock IDs of critical clocks that
      *                 should not be disabled without a knowledgeable driver
      * @num_crit_mod_clks: Number of entries in crit_mod_clks[]
+     * @never_disable_mod_clks: Array with Module Clock IDs of clocks that
+     *                          should not be disabled even if they seem to
+     *                          be unused
+     * @num_never_disable_mod_clks: Number of entries in
+     *                              never_disable_mod_clks[]
      *
      * @core_pm_clks: Array with IDs of Core Clocks that are suitable for Power
      *                Management, in addition to Module Clocks
@@ -141,6 +146,10 @@ struct cpg_mssr_info {
 	const unsigned int *crit_mod_clks;
 	unsigned int num_crit_mod_clks;
 
+	/* Module Clocks that should not be disabled even if unused */
+	const unsigned int *never_disable_mod_clks;
+	unsigned int num_never_disable_mod_clks;
+
 	/* Core Clocks suitable for PM, in addition to the Module Clocks */
 	const unsigned int *core_pm_clks;
 	unsigned int num_core_pm_clks;
-- 
2.7.4




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