RE: [PATCH v2 2/8] soc: renesas: rcar-sysc: Add r8a774b1 support

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HI Geert,

Thanks for the feedback.

> Subject: Re: [PATCH v2 2/8] soc: renesas: rcar-sysc: Add r8a774b1 support
> 
> Hi Biju,
> 
> On Thu, Sep 19, 2019 at 10:17 AM Biju Das <biju.das@xxxxxxxxxxxxxx>
> wrote:
> > Add support for RZ/G2N (R8A774B1) SoC power areas to the R-Car SYSC
> > driver.
> >
> > Signed-off-by: Biju Das <biju.das@xxxxxxxxxxxxxx>
> 
> Thanks for your patch!
> 
> > --- /dev/null
> > +++ b/drivers/soc/renesas/r8a774b1-sysc.c
> > @@ -0,0 +1,35 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Renesas RZ/G2N System Controller
> > + * Copyright (C) 2019 Renesas Electronics Corp.
> > + *
> > + * Based on Renesas R-Car M3-W System Controller
> > + * Copyright (C) 2016 Glider bvba
> > + */
> > +
> > +#include <linux/bug.h>
> 
> This include doesn't seem to be used?

OK, Will remove .
> > +#include <linux/kernel.h>
> > +
> > +#include <dt-bindings/power/r8a774b1-sysc.h>
> > +
> > +#include "rcar-sysc.h"
> > +
> > +static const struct rcar_sysc_area r8a774b1_areas[] __initconst = {
> > +       { "always-on",      0, 0, R8A774B1_PD_ALWAYS_ON, -1,
> PD_ALWAYS_ON },
> > +       { "ca57-scu",   0x1c0, 0, R8A774B1_PD_CA57_SCU,
> R8A774B1_PD_ALWAYS_ON,
> > +         PD_SCU },
> > +       { "ca57-cpu0",   0x80, 0, R8A774B1_PD_CA57_CPU0,
> R8A774B1_PD_CA57_SCU,
> > +         PD_CPU_NOCR },
> > +       { "ca57-cpu1",   0x80, 1, R8A774B1_PD_CA57_CPU1,
> R8A774B1_PD_CA57_SCU,
> > +         PD_CPU_NOCR },
> > +       { "a3vc",       0x380, 0, R8A774B1_PD_A3VC,
> R8A774B1_PD_ALWAYS_ON },
> > +       { "a3vp",       0x340, 0, R8A774B1_PD_A3VP,
> R8A774B1_PD_ALWAYS_ON },
> > +       { "a2vc1",      0x3c0, 1, R8A774B1_PD_A2VC1,    R8A774B1_PD_A3VC },
> > +       { "3dg-a",      0x100, 0, R8A774B1_PD_3DG_A,
> R8A774B1_PD_ALWAYS_ON },
> > +       { "3dg-b",      0x100, 1, R8A774B1_PD_3DG_B,    R8A774B1_PD_3DG_A
> },
> > +};
> > +
> > +const struct rcar_sysc_info r8a774b1_sysc_info __initconst = {
> > +       .areas = r8a774b1_areas,
> > +       .num_areas = ARRAY_SIZE(r8a774b1_areas),
> 
> Given the Hardware User's Manual documents the presence of the
> SYSCEXTMASK register on RZ/G2N, you want to fill in the .extmask_{offs,val}
> fields, too.

Will Send V3, with the above changes.

> With the above fixed:
> Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
> 
> Gr{oetje,eeting}s,
> 
>                         Geert
> 
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-
> m68k.org
> 
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
>                                 -- Linus Torvalds




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