Re: [PATCH 3/5] clk: renesas: rcar-gen3: Correct parent clock of SYS-DMAC

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On Wed, Mar 27, 2019 at 01:41:38PM +0100, Geert Uytterhoeven wrote:
> From: Takeshi Kihara <takeshi.kihara.df@xxxxxxxxxxx>
> 
> The clock sources of the AXI BUS clock (266.66 MHz) used for SYS-DMAC
> DMA transfers are:
> 
>     Channel      R-Car H3    R-Car M3-W    R-Car M3-N
>     -------------------------------------------------
>     SYS-DMAC0    S0D3        S0D3          S0D3
>     SYS-DMAC1    S3D1        S3D1          S3D1
>     SYS-DMAC2    S3D1        S3D1          S3D1
> 
> As a result, change the parent clocks of the SYS-DMAC{1,2} module clocks
> on R-Car H3, R-Car M3-W, and R-Car M3-N to S3D1.
> 
> NOTE: This information will be reflected in a future revision of the
>       R-Car Gen3 Hardware Manual.
> 
> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@xxxxxxxxxxx>
> [geert: Update RZ/G2M]
> Signed-off-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>

Reviewed-by: Simon Horman <horms+renesas@xxxxxxxxxxxx>

> ---
>  drivers/clk/renesas/r8a774a1-cpg-mssr.c | 4 ++--
>  drivers/clk/renesas/r8a7795-cpg-mssr.c  | 4 ++--
>  drivers/clk/renesas/r8a7796-cpg-mssr.c  | 4 ++--
>  drivers/clk/renesas/r8a77965-cpg-mssr.c | 4 ++--
>  4 files changed, 8 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/clk/renesas/r8a774a1-cpg-mssr.c b/drivers/clk/renesas/r8a774a1-cpg-mssr.c
> index 676e6a1120900b17..13bf7260204f5078 100644
> --- a/drivers/clk/renesas/r8a774a1-cpg-mssr.c
> +++ b/drivers/clk/renesas/r8a774a1-cpg-mssr.c
> @@ -123,8 +123,8 @@ static const struct mssr_mod_clk r8a774a1_mod_clks[] __initconst = {
>  	DEF_MOD("msiof2",		 209,	R8A774A1_CLK_MSO),
>  	DEF_MOD("msiof1",		 210,	R8A774A1_CLK_MSO),
>  	DEF_MOD("msiof0",		 211,	R8A774A1_CLK_MSO),
> -	DEF_MOD("sys-dmac2",		 217,	R8A774A1_CLK_S0D3),
> -	DEF_MOD("sys-dmac1",		 218,	R8A774A1_CLK_S0D3),
> +	DEF_MOD("sys-dmac2",		 217,	R8A774A1_CLK_S3D1),
> +	DEF_MOD("sys-dmac1",		 218,	R8A774A1_CLK_S3D1),
>  	DEF_MOD("sys-dmac0",		 219,	R8A774A1_CLK_S0D3),
>  	DEF_MOD("cmt3",			 300,	R8A774A1_CLK_R),
>  	DEF_MOD("cmt2",			 301,	R8A774A1_CLK_R),
> diff --git a/drivers/clk/renesas/r8a7795-cpg-mssr.c b/drivers/clk/renesas/r8a7795-cpg-mssr.c
> index 5b658b0861180268..a576a42f104442ff 100644
> --- a/drivers/clk/renesas/r8a7795-cpg-mssr.c
> +++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c
> @@ -130,8 +130,8 @@ static struct mssr_mod_clk r8a7795_mod_clks[] __initdata = {
>  	DEF_MOD("msiof2",		 209,	R8A7795_CLK_MSO),
>  	DEF_MOD("msiof1",		 210,	R8A7795_CLK_MSO),
>  	DEF_MOD("msiof0",		 211,	R8A7795_CLK_MSO),
> -	DEF_MOD("sys-dmac2",		 217,	R8A7795_CLK_S0D3),
> -	DEF_MOD("sys-dmac1",		 218,	R8A7795_CLK_S0D3),
> +	DEF_MOD("sys-dmac2",		 217,	R8A7795_CLK_S3D1),
> +	DEF_MOD("sys-dmac1",		 218,	R8A7795_CLK_S3D1),
>  	DEF_MOD("sys-dmac0",		 219,	R8A7795_CLK_S0D3),
>  	DEF_MOD("sceg-pub",		 229,	R8A7795_CLK_CR),
>  	DEF_MOD("cmt3",			 300,	R8A7795_CLK_R),
> diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c
> index fa1c1ac14d5caa1c..369092e8d893255f 100644
> --- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
> +++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
> @@ -127,8 +127,8 @@ static const struct mssr_mod_clk r8a7796_mod_clks[] __initconst = {
>  	DEF_MOD("msiof2",		 209,	R8A7796_CLK_MSO),
>  	DEF_MOD("msiof1",		 210,	R8A7796_CLK_MSO),
>  	DEF_MOD("msiof0",		 211,	R8A7796_CLK_MSO),
> -	DEF_MOD("sys-dmac2",		 217,	R8A7796_CLK_S0D3),
> -	DEF_MOD("sys-dmac1",		 218,	R8A7796_CLK_S0D3),
> +	DEF_MOD("sys-dmac2",		 217,	R8A7796_CLK_S3D1),
> +	DEF_MOD("sys-dmac1",		 218,	R8A7796_CLK_S3D1),
>  	DEF_MOD("sys-dmac0",		 219,	R8A7796_CLK_S0D3),
>  	DEF_MOD("cmt3",			 300,	R8A7796_CLK_R),
>  	DEF_MOD("cmt2",			 301,	R8A7796_CLK_R),
> diff --git a/drivers/clk/renesas/r8a77965-cpg-mssr.c b/drivers/clk/renesas/r8a77965-cpg-mssr.c
> index 48a9add7d4db8975..623bbda2d24ec112 100644
> --- a/drivers/clk/renesas/r8a77965-cpg-mssr.c
> +++ b/drivers/clk/renesas/r8a77965-cpg-mssr.c
> @@ -123,8 +123,8 @@ static const struct mssr_mod_clk r8a77965_mod_clks[] __initconst = {
>  	DEF_MOD("msiof2",		209,	R8A77965_CLK_MSO),
>  	DEF_MOD("msiof1",		210,	R8A77965_CLK_MSO),
>  	DEF_MOD("msiof0",		211,	R8A77965_CLK_MSO),
> -	DEF_MOD("sys-dmac2",		217,	R8A77965_CLK_S0D3),
> -	DEF_MOD("sys-dmac1",		218,	R8A77965_CLK_S0D3),
> +	DEF_MOD("sys-dmac2",		217,	R8A77965_CLK_S3D1),
> +	DEF_MOD("sys-dmac1",		218,	R8A77965_CLK_S3D1),
>  	DEF_MOD("sys-dmac0",		219,	R8A77965_CLK_S0D3),
>  
>  	DEF_MOD("cmt3",			300,	R8A77965_CLK_R),
> -- 
> 2.17.1
> 



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