RE: [PATCH] clk: renesas: r8a774a1: Fix LAST_DT_CORE_CLK

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> From: Fabrizio Castro <fabrizio.castro@xxxxxxxxxxxxxx>
> Sent: 22 February 2019 12:00
> 
> Enum LAST_DT_CORE_CLK needs updating as R8A774A1_CLK_CANFD
> was recently added and it's the core clock with the highest
> index.
> 
> Signed-off-by: Fabrizio Castro <fabrizio.castro@xxxxxxxxxxxxxx>
Reviewed-by: Chris Paterson <chris.paterson2@xxxxxxxxxxx>

> ---
>  drivers/clk/renesas/r8a774a1-cpg-mssr.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/clk/renesas/r8a774a1-cpg-mssr.c
> b/drivers/clk/renesas/r8a774a1-cpg-mssr.c
> index 5fcd6c5..8e7bb43 100644
> --- a/drivers/clk/renesas/r8a774a1-cpg-mssr.c
> +++ b/drivers/clk/renesas/r8a774a1-cpg-mssr.c
> @@ -21,7 +21,7 @@
> 
>  enum clk_ids {
>  	/* Core Clock Outputs exported to DT */
> -	LAST_DT_CORE_CLK = R8A774A1_CLK_OSC,
> +	LAST_DT_CORE_CLK = R8A774A1_CLK_CANFD,
> 
>  	/* External Input Clocks */
>  	CLK_EXTAL,
> --
> 2.7.4





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