> > > Fix setting value for IRQCTL register. We are setting the last 6 bits > > > of (IRQCTL) to be 1 (0x3f), this is only suitable for H3ES1.*, according > > > to new Hardware manual values 1 are "setting prohibited" for Gen3! > > Hum, as you point out this change is not suitable for H3 ES1.x so this > > would introduce a regression, which is not good. I will leave the final > > word to Wolfram but in my view you need to introduce quirk handling to > > keep support for H3 ES1.x or blacklist that SoC in the driver. > > With this patch and current state of the Gen3 thermal driver, H3ES1.* is > still correctly supported. > > priv->thermal_init = rcar_gen3_thermal_init; > if (soc_device_match(r8a7795es1)) > priv->thermal_init = rcar_gen3_thermal_init_r8a7795es1; Makes sense to me. Niklas?
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