RE: [PATCH/RFC] ARM: shmobile: Always enable ARCH_TIMER on SoCs with A7 and/or A15

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On Friday, July 13, 2018, linux-renesas-soc-owner@xxxxxxxxxxxxxxx wrote:
> > Exactly what the level of software support is available for the ARM
> > timers at this point I'm not so sure about.
> 
> Using the TWD timer indeed has two issues:
>   - It's available on multi-core Cortex-A9 SoCs only,
>   - Its driver does not call register_current_timer_delay(), so it doesn't
> set
>     up lpj_fine for skipping loop calibration.
> 
> The global timer driver does call register_current_timer_delay(), but so
> far no
> Renesas SoCs describe its presence in DT.
> 
> At least SH-Mobile AG5 and R-Car M1A and H1 seem to have it.
> RZ/A1 (and A2) and R-Mobile A1 don't seem to have it, though.
> Perhaps the call to register_current_timer_delay() could be added to
> the RZ/A OSTM driver?

For RZ/A1, technically you could use MTU2 or OSTM as your system timer. 
However, no one would every use MTU2 because OSTM is way more accurate.

Regardless, would we always call register_current_timer_delay() from the
OSTM driver?
Note that there are 2 OSTM channels on RZ/A1. The first one is loaded as
a clocksource, the second is used as an event counter. Would we call 
register_current_timer_delay() for both instances?

Chris





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