On Wed, Jun 20, 2018 at 02:51:47PM +0200, Geert Uytterhoeven wrote:
> Hi Ulrich,
>
> On Wed, Jun 20, 2018 at 2:01 PM Ulrich Hecht
> <ulrich.hecht+renesas@xxxxxxxxx> wrote:
> > From: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@xxxxxxxxxxx>
> >
> > This patch adds MSIOF device nodes for the R8A77995 SoC.
> >
> > Signed-off-by: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@xxxxxxxxxxx>
> > Signed-off-by: Takeshi Kihara <takeshi.kihara.df@xxxxxxxxxxx>
> > [uli: remove unimplemented ref clock, clock-names]
> > Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@xxxxxxxxx>
>
> Thanks for the update!
>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
>
> > --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> > +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> > @@ -798,6 +798,68 @@
> > compatible = "renesas,prr";
> > reg = <0 0xfff00044 0 4>;
> > };
> > +
> > + msiof0: spi@e6e90000 {
>
> To preserve sort order, the msiof nodes should be inserted in between the SCIF
> and VIN nodes.
Thanks, I have made that change and queued-up the following:
From: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@xxxxxxxxxxx>
Subject: [PATCH] arm64: dts: r8a77995: Add MSIOF device nodes
This patch adds MSIOF device nodes for the R8A77995 SoC.
Signed-off-by: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@xxxxxxxxxxx>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@xxxxxxxxxxx>
[uli: remove unimplemented ref clock, clock-names]
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@xxxxxxxxx>
Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
[simon: preserved node ordering by moving msiof nodes to before vin nodes]
Signed-off-by: Simon Horman <horms+renesas@xxxxxxxxxxxx>
---
arch/arm64/boot/dts/renesas/r8a77995.dtsi | 62 +++++++++++++++++++++++++++++++
1 file changed, 62 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
index 1de6ffca4772..6c0a8217d40f 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
@@ -622,6 +622,68 @@
status = "disabled";
};
+ msiof0: spi@e6e90000 {
+ compatible = "renesas,msiof-r8a77995",
+ "renesas,rcar-gen3-msiof";
+ reg = <0 0xe6e90000 0 0x64>;
+ interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 211>;
+ dmas = <&dmac1 0x41>, <&dmac1 0x40>,
+ <&dmac2 0x41>, <&dmac2 0x40>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 211>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ msiof1: spi@e6ea0000 {
+ compatible = "renesas,msiof-r8a77995",
+ "renesas,rcar-gen3-msiof";
+ reg = <0 0xe6ea0000 0 0x64>;
+ interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 210>;
+ dmas = <&dmac1 0x43>, <&dmac1 0x42>,
+ <&dmac2 0x43>, <&dmac2 0x42>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 210>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ msiof2: spi@e6c00000 {
+ compatible = "renesas,msiof-r8a77995",
+ "renesas,rcar-gen3-msiof";
+ reg = <0 0xe6c00000 0 0x64>;
+ interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 209>;
+ dmas = <&dmac0 0x45>, <&dmac0 0x44>;
+ dma-names = "tx", "rx";
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 209>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ msiof3: spi@e6c10000 {
+ compatible = "renesas,msiof-r8a77995",
+ "renesas,rcar-gen3-msiof";
+ reg = <0 0xe6c10000 0 0x64>;
+ interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 208>;
+ dmas = <&dmac0 0x47>, <&dmac0 0x46>;
+ dma-names = "tx", "rx";
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 208>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
vin4: video@e6ef4000 {
compatible = "renesas,vin-r8a77995";
reg = <0 0xe6ef4000 0 0x1000>;
--
2.11.0
