From: Jacopo Mondi <jacopo+renesas@xxxxxxxxxx>
As the PHY interface installed on the Draak board, provides TX
channel delay, make the "phy-mode" property a board-specific one, meant
to override the one specified in the SoC DTSI.
Follow up patches will reset the r8a77995 SoC DTSI to use "rgmii" mode
and let the board file override that.
Signed-off-by: Jacopo Mondi <jacopo+renesas@xxxxxxxxxx>
Signed-off-by: Simon Horman <horms+renesas@xxxxxxxxxxxx>
---
arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
index 34c7f58417ba..d03f19414028 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
@@ -189,6 +189,7 @@
pinctrl-names = "default";
renesas,no-ether-link;
phy-handle = <&phy0>;
+ phy-mode = "rgmii-txid";
status = "okay";
phy0: ethernet-phy@0 {
--
2.11.0
