Hi Biju,
Thank you for the patch.
On Wednesday, 18 October 2017 12:33:46 EEST Biju Das wrote:
> From: Fabrizio Castro <fabrizio.castro@xxxxxxxxxxxxxx>
>
> Signed-off-by: Fabrizio Castro <fabrizio.castro@xxxxxxxxxxxxxx>
> Reviewed-by: Biju Das <biju.das@xxxxxxxxxxxxxx>
Reviewed-by: Laurent Pinchart <laurent.pinchart@xxxxxxxxxxxxxxxx>
> ---
> arch/arm/boot/dts/r8a7743.dtsi | 30 ++++++++++++++++++++++++++++++
> 1 file changed, 30 insertions(+)
>
> diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
> index 7bbba4a..fafb10e 100644
> --- a/arch/arm/boot/dts/r8a7743.dtsi
> +++ b/arch/arm/boot/dts/r8a7743.dtsi
> @@ -1033,6 +1033,36 @@
> };
> };
>
> + du: display@feb00000 {
> + compatible = "renesas,du-r8a7743";
> + reg = <0 0xfeb00000 0 0x40000>,
> + <0 0xfeb90000 0 0x1c>;
> + reg-names = "du", "lvds.0";
> + interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 724>,
> + <&cpg CPG_MOD 723>,
> + <&cpg CPG_MOD 726>;
> + clock-names = "du.0", "du.1", "lvds.0";
> + status = "disabled";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + du_out_rgb: endpoint {
> + };
> + };
> + port@1 {
> + reg = <1>;
> + du_out_lvds0: endpoint {
> + };
> + };
> + };
> + };
> +
> pci0: pci@ee090000 {
> compatible = "renesas,pci-r8a7743",
> "renesas,pci-rcar-gen2";
--
Regards,
Laurent Pinchart
