From: Vladimir Barinov <vladimir.barinov+renesas@xxxxxxxxxxxxxxxxxx> It will be used ADG clock initial settings, and will be sound codec's initial system clock which needs maximum clock frequency. Thus, descending order is required. Signed-off-by: Vladimir Barinov <vladimir.barinov+renesas@xxxxxxxxxxxxxxxxxx> --- arch/arm64/boot/dts/renesas/ulcb.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/renesas/ulcb.dtsi b/arch/arm64/boot/dts/renesas/ulcb.dtsi index b5c6ee0..d1a3f3b 100644 --- a/arch/arm64/boot/dts/renesas/ulcb.dtsi +++ b/arch/arm64/boot/dts/renesas/ulcb.dtsi @@ -281,7 +281,7 @@ /* audio_clkout0/1/2/3 */ #clock-cells = <1>; - clock-frequency = <11289600 12288000>; + clock-frequency = <12288000 11289600>; status = "okay"; -- 1.9.1
