On Tue, May 30, 2017 at 10:02:18PM +0200, Wolfram Sang wrote: > On Tue, May 30, 2017 at 11:03:46AM +0200, Wolfram Sang wrote: > > Most registers need to wait until the command is completed, not > > necessarily until the bus is free. At least, R-Car 2+ SoCs can signal > > that via the CBSY bit, so let's use it there instead of SCLKDIVEN to > > save a little bit of delay. > > > > Signed-off-by: Wolfram Sang <wsa+renesas@xxxxxxxxxxxxxxxxxxxx> > > --- > > > > Tested with a Renesas Lager board (H2). Moved big files around across different > > SD cards, re- inserted cards multiple times. All worked fine. > > > > @Dirk: can you do some additional testing for your use case? That would be much > > appreciated! > > OK, since Dirk told me he'll need some more time to test it anyhow and > Simon meanwhile sent some cleanup patches, I'll simply post an updated > version of this patch once Simon's cleanup patches hit mmc/next. I think > this will be easiest. Thanks, sorry for the clash - we seem to often hit the SDHI driver at about the same time.
