On 12/19, Geert Uytterhoeven wrote:
> Hi Chris, Mike, Stephen,
>
> On Thu, Dec 15, 2016 at 6:00 PM, Chris Brandt <chris.brandt@xxxxxxxxxxx> wrote:
> > The RZ/A1 is different than the other Renesas SOCs because the MSTP
> > registers are 8-bit instead of 32-bit and if you try writing values as
> > 32-bit nothing happens...meaning this driver never worked for r7s72100.
>
> Thanks for your patch!
>
> The only reason it ever worked was that almost all module clocks are
> enabled at boot time...
>
> > Fixes: b6face404f38 ("ARM: shmobile: r7s72100: add essential clock nodes to dtsi")
> > Signed-off-by: Chris Brandt <chris.brandt@xxxxxxxxxxx>
>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
> Tested-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
>
> Mike/Stephen: as this is a fix for stable (v3.16+), can you please take it
> directly?
Sure, is it a fix for something that has been exposed as a
problem in this merge window? Just trying to gauge the urgency of
merging this.
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