On Tue, Nov 8, 2016 at 10:25 PM, Sergei Shtylyov
<sergei.shtylyov@xxxxxxxxxxxxxxxxxx> wrote:
> Add RZ/G1E (R8A7745) Clock Pulse Generator / Module Standby and Software
> Reset support, using the CPG/MSSR driver core and the common R-Car Gen2
> (and RZ/G) code.
>
> Based on the proof-of-concept R8A7791 CPG/MSSR patch by Geert Uytterhoeven
> <geert+renesas@xxxxxxxxx>.
>
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@xxxxxxxxxxxxxxxxxx>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
>
> ---
> This patch is against the 'clk-next' branch of CLK group's 'linux.git' repo
> plus the R8A7743 clock driver patch. It depends on the common R-Car gen2 (and
> RZ/G) support just posted.
>
> Changes in version 4:
> - changed the Z2 clock's divisor to 1;
> - passed the PLL0 divisor to rcar_gen2_cpg_init();
> - renamed the ACP clock to CPEX;
> - removed the thermal module clock.
Thanks!
Will queue with the following trivial changes:
- pass cpg_mode to rcar_gen2_cpg_init(),
- sort clock names in DT bindings,
- reformat tables for easier comparison with other clock drivers.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
