On Fri, Oct 28, 2016 at 10:56:18PM +0900, Magnus Damm wrote: > Hi Simon, > > On Fri, Oct 28, 2016 at 10:50 PM, Simon Horman <horms@xxxxxxxxxxxx> wrote: > > On Fri, Oct 28, 2016 at 06:12:37PM +0900, Magnus Damm wrote: > >> Hi Ulrich, Simon, everyone, > >> > >> On Thu, Sep 15, 2016 at 1:45 AM, Ulrich Hecht > >> <ulrich.hecht+renesas@xxxxxxxxx> wrote: > >> > Hi! > >> > > >> > This enables the three DMA controllers. Identical to the setup on r8a7795. > >> > Based on renesas-drivers-2016-09-13-v4.8-rc6. > >> > > >> > CU > >> > Uli > >> > > >> > > >> > Ulrich Hecht (3): > >> > clk: renesas: r8a7796: Add SYS-DMAC clocks > >> > arm64: renesas: r8a7796: add SYS-DMAC controller nodes > >> > dmaengine: rcar-dmac: Document R-Car M3-W bindings > >> > >> Thanks for your efforts. I noticed that the clock bits have been > >> queued up by Geert, but other parts seem to be missing. > >> > >> Can you please ping/poke/resend or whatever is needed to move the rest > >> of the series forward? > > > > I'm happy to queue up the arm64 patch (which Ulrich recently pinged me > > about). But I wanted to first confirm that it doesn't haven any > > implications for enabling 64bit memory. > > Thanks. The SYS-DMAC hardware is a rare case that is able to perform > 64-bit bus mastering without the IPMMU, so it is fine to enable at > this point even though the IPMMU is not available. Hi Magnus, thanks for clarifying that. I have queued up the "arm64" patch listed above.
