R-Car gen2 PLL0/2/4 frequencies incorrect?

[Sergei Shtylyov <sergei.shtylyov@xxxxxxxxxxxxxxxxxx>]

Hello.

drivers/clk/renesas/rcar-gen3-cpg.c seems to forget that the PLL0/2/4 all have 
a fixed divisor (2) while it multiplies PLLxCR.STC with 2 for the 'mult' 
variable (see the manual). All the dependent frequencies this should be 
reported greater x2 than the actual ones...

MBR, Sergei