Hi Wolfram,
On Mon, Mar 21, 2016 at 8:19 PM, Wolfram Sang <wsa@xxxxxxxxxxxxx> wrote:
> From: Wolfram Sang <wsa+renesas@xxxxxxxxxxxxxxxxxxxx>
>
> Signed-off-by: Wolfram Sang <wsa+renesas@xxxxxxxxxxxxxxxxxxxx>
> ---
> drivers/clk/shmobile/r8a7795-cpg-mssr.c | 3 +++
> include/dt-bindings/clock/r8a7795-cpg-mssr.h | 5 +++--
> 2 files changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/clk/shmobile/r8a7795-cpg-mssr.c b/drivers/clk/shmobile/r8a7795-cpg-mssr.c
> index a9f933055663cb..4dda7f2ed0bcb6 100644
> --- a/drivers/clk/shmobile/r8a7795-cpg-mssr.c
> +++ b/drivers/clk/shmobile/r8a7795-cpg-mssr.c
> @@ -116,6 +116,9 @@ static const struct cpg_core_clk r8a7795_core_clks[] __initconst = {
> DEF_DIV6P1("mso", R8A7795_CLK_MSO, CLK_PLL1_DIV4, 0x014),
> DEF_DIV6P1("hdmi", R8A7795_CLK_HDMI, CLK_PLL1_DIV2, 0x250),
> DEF_DIV6P1("canfd", R8A7795_CLK_CANFD, CLK_PLL1_DIV4, 0x244),
> +
> + DEF_DIV6_RO("osc", R8A7795_CLK_OSC, CLK_EXTAL, 0x0240, 8),
> + DEF_DIV6_RO("r_int", R8A7795_CLK_RINT, CLK_EXTAL, 0x0240, 32),
Ah, so you use the same register for both.
However, the notes for Table 8.2a say there are _2_ possible values:
"The initial value depend on MD14, MD13.
When MD14=L and MD13 = H, RCLK = 32.89 (kHz)
In the other setting, RCLK = 32.55 (kHz)
The initial value depend on MD14, MD13.
When MD14=L and MD13 = H, OSCCLK = 131.57 (kHz).
In the other setting, OSCCLK = 130.20 (kHz)"
While the register documentation says there are _4_ possible values, and it
doesn't document the relation behind these values and the "dividers":
"MD14=0, MD13=0: 6’B00_1111
MD14=0, MD13=1: 6’B01_0010
MD14=1, MD13=0: 6’B01_0111
MD14=1, MD13=1: 6’B01_1111"
I also cannot see how you get to the RCLK/OSCCLK values by using EXTAL
(33.33333 MHz on final boards) and the dividers above.
What am I missing (ah, morning coffee)?
> --- a/include/dt-bindings/clock/r8a7795-cpg-mssr.h
> +++ b/include/dt-bindings/clock/r8a7795-cpg-mssr.h
> @@ -57,7 +57,8 @@
> #define R8A7795_CLK_CSIREF 42
> #define R8A7795_CLK_CP 43
> #define R8A7795_CLK_CPEX 44
> -#define R8A7795_CLK_R 45
> -#define R8A7795_CLK_OSC 46
> +#define R8A7795_CLK_RINT 45
> +#define R8A7795_CLK_R 46
> +#define R8A7795_CLK_OSC 47
This list of values is append-only, as it's part of the stable DT ABI.
Please add new values at the end.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
