On Fri, Mar 11, 2016 at 09:01:09AM +0100, Geert Uytterhoeven wrote:
> Hi Simon,
>
> On Fri, Mar 11, 2016 at 12:34 AM, Simon Horman <horms@xxxxxxxxxxxx> wrote:
> > On Wed, Mar 09, 2016 at 08:18:55PM +0100, Geert Uytterhoeven wrote:
> >> Add a device node for the System Controller.
> >> Hook up the Cortex-A57 CPU cores and the Cortex-A57 and Cortex A53 L2
> >> caches/SCUs to their respective PM domains.
> >> Hook up all devices that are part of the CPG/MSSR Clock Domain to the
> >> SYSC "always-on" PM Domain.
> >
> > [snip]
> >
> >> + sysc: system-controller@e6180000 {
> >> + compatible = "renesas,r8a7795-sysc";
> >> + reg = <0 0xe6180000 0 0x0400>;
> >
> > In table 9.2 of v0.51e of the documentation I see some registers
> > beyond the 0x400 range above. Perhaps it could be enlarged accordingly?
>
> No, these registers do not apply to R-Car H3.
True.
In that case I'm fine with all the patches in this series.
