Honestly, I still think this is a micro-optimization: Assuming SCLKDIVEN is basically CBSY plus 8 SD clock cycles, then we'd save in the best case (SD clock is slowest, 24 MHz) around 333ns while we are polling with 1 us granularity... However, in case I assumed something wrong and so you guys have something to play with, here is an RFC. Let me know what you think. Wolfram Sang (2): mmc: tmio/sdhi: introduce flag for RCar specific features mmc: sdhi: on RCar, make use of CBSY bit drivers/mmc/host/sh_mobile_sdhi.c | 19 +++++++++++++------ drivers/mmc/host/tmio_mmc_pio.c | 6 +++--- include/linux/mfd/tmio.h | 4 ++-- include/linux/mmc/tmio.h | 3 +++ 4 files changed, 21 insertions(+), 11 deletions(-) -- 2.1.4
