On 11/2/23 11:43, Jan Kiszka wrote:
RTI1 watchdog also powers up R5F core 1. And this could happen either in
When writing "... also powers up...", other than R5F core 1, what else is being
powered?
Would be a question for the SoC vendor - I assumed that only mcu_rti1
[1] goes on when enabling it. But also mcu_r5fss0_core1 is enabled after
that, at least according to the respective TI-SCI query that the is_on
handler is performing. I've tested that under Linux and in U-Boot.
As described in section 12.5.2.1 of AM64x TRM
(https://www.ti.com/lit/pdf/SPRUIM2) -There is a RTI for each CPU core.
And it is not intended to be use RTI provisioned for a particular CPU
core with a different core.
And also as shown in section (5.2.2.2.1.3.1) the CPU core and
corresponding RTI share the same power sub module (LPSC), so enabling
one powers on the other.
As Suman suggested, it seems more appropriate to enable the RTI watchdog
timers in the remoteproc driver. Legacy omap remoteproc drivers have
this support and needs to be extended to k3 remoteproc drivers.
Another option could be to DEFER RTI probe until corresponding
remoteproc driver is probed.
Any other solutions to maintain this order of enabling remote core and
the corresponding RTI/WDT?
