On Thu, Jan 3, 2019 at 2:30 AM Jason Gunthorpe <jgg@xxxxxxxxxxxx> wrote: > > On Mon, Dec 31, 2018 at 01:10:04AM -0500, Devesh Sharma wrote: > > > @@ -2418,12 +2422,15 @@ static int bnxt_qplib_cq_process_res_ud(struct bnxt_qplib_cq *cq, > > } > > cqe = *pcqe; > > cqe->opcode = hwcqe->cqe_type_toggle & CQ_BASE_CQE_TYPE_MASK; > > - cqe->length = le32_to_cpu(hwcqe->length); > > + cqe->length = (u32)le16_to_cpu(hwcqe->length); > > + cqe->cfa_meta = le16_to_cpu(hwcqe->cfa_metadata); > > cqe->invrkey = le32_to_cpu(hwcqe->imm_data); > > cqe->flags = le16_to_cpu(hwcqe->flags); > > cqe->status = hwcqe->status; > > cqe->qp_handle = (u64)(unsigned long)qp; > > - memcpy(cqe->smac, hwcqe->src_mac, 6); > > + smac = (u8 *)hwcqe->src_mac; > > + for (i = 0, j = (ETH_ALEN - 1); i < ETH_ALEN; i++, j--) > > + cqe->smac[i] = smac[j]; > > Is this an endian-ness bug fix for the current driver too? True, it is. do you prefer this in a separate patch? > > Jason
