- Create get_aspm_enable() to compute aspm_register_info.enable directly
- Replace all aspm_register_info.enable references with get_aspm_enable()
- In pcie_get_aspm_reg() remove reference to aspm_register_info.l1ss_cap*
- Remove aspm_register_info.enabled
- In pcie_aspm_cap_init() remove all calls to pcie_get_aspm_reg(), since
it now does nothing. All the values are calculated elsewhere.
Signed-off-by: Saheed O. Bolarinwa <refactormyself@xxxxxxxxx>
---
NOTE: To avoid messing up this patch, the struct aspm_register_info is
removed in the next patch. I am not sure if it is better to merge them.
drivers/pci/pcie/aspm.c | 28 ++++++++++++----------------
1 file changed, 12 insertions(+), 16 deletions(-)
diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c
index f89d3b2be1c7..e43fdf0cd08c 100644
--- a/drivers/pci/pcie/aspm.c
+++ b/drivers/pci/pcie/aspm.c
@@ -383,7 +383,6 @@ static void encode_l12_threshold(u32 threshold_us, u32 *scale, u32 *value)
}
struct aspm_register_info {
- u32 enabled:2;
};
static void pcie_get_aspm_reg(struct pci_dev *pdev,
@@ -392,7 +391,6 @@ static void pcie_get_aspm_reg(struct pci_dev *pdev,
u16 ctl;
pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &ctl);
- info->enabled = ctl & PCI_EXP_LNKCTL_ASPMC;
}
static void pcie_aspm_check_latency(struct pci_dev *endpoint)
@@ -513,6 +511,14 @@ static void aspm_support(struct pci_dev *pdev)
return (pdev->lnkcap & PCI_EXP_LNKCAP_ASPMS) >> 10;
}
+static u32 get_aspm_enable(struct pci_dev *pdev)
+{
+ u16 ctl;
+
+ pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &ctl);
+ return (ctl & PCI_EXP_LNKCTL_ASPMC);
+}
+
static void pcie_aspm_cap_init(struct pcie_link_state *link, int blacklist)
{
struct pci_dev *child = link->downstream, *parent = link->pdev;
@@ -527,10 +533,6 @@ static void pcie_aspm_cap_init(struct pcie_link_state *link, int blacklist)
return;
}
- /* Get upstream/downstream components' register state */
- pcie_get_aspm_reg(parent, &upreg);
- pcie_get_aspm_reg(child, &dwreg);
-
/*
* If ASPM not supported, don't mess with the clocks and link,
* bail out now.
@@ -546,13 +548,6 @@ static void pcie_aspm_cap_init(struct pcie_link_state *link, int blacklist)
pci_read_config_dword(child, child->l1ss_cap_ptr + PCI_L1SS_CTL1,
&dw_l1ss_ctl1);
- /*
- * Re-read upstream/downstream components' register state
- * after clock configuration
- */
- pcie_get_aspm_reg(parent, &upreg);
- pcie_get_aspm_reg(child, &dwreg);
-
/*
* Setup L0s state
*
@@ -563,9 +558,9 @@ static void pcie_aspm_cap_init(struct pcie_link_state *link, int blacklist)
if (aspm_support(parent) & aspm_support(child) & PCIE_LINK_STATE_L0S)
link->aspm_support |= ASPM_STATE_L0S;
- if (dwreg.enabled & PCIE_LINK_STATE_L0S)
+ if (get_aspm_enable(child) & PCIE_LINK_STATE_L0S)
link->aspm_enabled |= ASPM_STATE_L0S_UP;
- if (upreg.enabled & PCIE_LINK_STATE_L0S)
+ if (get_aspm_enable(parent) & PCIE_LINK_STATE_L0S)
link->aspm_enabled |= ASPM_STATE_L0S_DW;
link->latency_up.l0s = calc_l0s_latency(parent);
link->latency_dw.l0s = calc_l0s_latency(child);
@@ -574,7 +569,8 @@ static void pcie_aspm_cap_init(struct pcie_link_state *link, int blacklist)
if (aspm_support(parent) & aspm_support(child) & PCIE_LINK_STATE_L1)
link->aspm_support |= ASPM_STATE_L1;
- if (upreg.enabled & dwreg.enabled & PCIE_LINK_STATE_L1)
+ if (get_aspm_enable(parent) & get_aspm_enable(child)
+ & PCIE_LINK_STATE_L1)
link->aspm_enabled |= ASPM_STATE_L1;
link->latency_up.l1 = calc_l1_latency(parent);
link->latency_dw.l1 = calc_l1_latency(child);
--
2.18.4
