Reply-all and don't top-post. See https://people.kernel.org/tglx/notes-about-netiquette On Mon, Jul 13, 2020 at 03:31:02PM +0530, Manish Raturi wrote: > Thanks, Bjorn, I am doing that (lspci -vvvxxxx) to dump all the > register, but in case of Link down, are there any specific registers > which we should look in, mostly I look below register: > > 1) Link status /control/capability > 2) Slot status /control/capability > 3) Lane error status registers. > > Any other register we can specifically look for. I have no idea what the problem is, so can't really help you, sorry. All you've said is that the link to an endpoint is down. I don't know whether the the slot is even powered up. You could try a different card to see whether that works. You could try the same card in a different machine to see if that works. If you think the link *should* be up, you could always debug it from a hardware point of view with a PCIe analyzer. > On Fri, Jul 10, 2020 at 12:54 AM Bjorn Helgaas <helgaas@xxxxxxxxxx> wrote: > > On Thu, Jul 09, 2020 at 12:44:24PM +0530, Manish Raturi wrote: > > > Hi Team, > > > > > > I have a generic query , if an hotplug pcie endpoint connected to the > > > CPU root port shows link down, then from the debugging perspective > > > w.r.t PCIE what all register can be dump during the failure condition, > > > what I can think of is these registers from the root port side > > > > > > 1) Link status /control/capability > > > 2) Slot status /control/capability > > > 3) Lane error status registers. > > > > > > Anything else we can dump which gives us more insight into the issue. > > > Also is there anything by which we can check from PCIE clock > > > perspective. > > > > If you have this: > > > > Root Port ----- Endpoint > > > > and the Link is down, you won't be able to read any registers from the > > Endpoint. You can dump all the Root Port registers, of course, e.g., > > with "lspci -vvvxxxx".
