On Thu, Jul 09, 2020 at 12:44:24PM +0530, Manish Raturi wrote: > Hi Team, > > I have a generic query , if an hotplug pcie endpoint connected to the > CPU root port shows link down, then from the debugging perspective > w.r.t PCIE what all register can be dump during the failure condition, > what I can think of is these registers from the root port side > > 1) Link status /control/capability > 2) Slot status /control/capability > 3) Lane error status registers. > > Anything else we can dump which gives us more insight into the issue. > Also is there anything by which we can check from PCIE clock > perspective. If you have this: Root Port ----- Endpoint and the Link is down, you won't be able to read any registers from the Endpoint. You can dump all the Root Port registers, of course, e.g., with "lspci -vvvxxxx".
