> > The workarounds for this are enabled by PCI quirls and either > > CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS=y or 'ioapicreroute' on > the > > command line. > > > > It might be wortha try to add the PCI ID of that box to the quirk > > list, i.e. the PCI ID matches in drivers/pci/quirks.c which belong to > > the > > function: quirk_reroute_to_boot_interrupts_intel(). > > Do you mean adding the PCI ID of the device that actually fires interrupt? It > can be any PCI card though (example: external ETH controller, data > acquisition module, etc). > Or you mean to add the ID of all PCIe root ports that routed to IOAPIC 2? > > Based on Haswell specification, seems like every entry on IOAPIC 2 will > experience this problem. > If to reroute every entry on IOAPIC 2 to IOAPIC 1, probably we should just > disable IOAPIC 2 instead? Hi Thomas, Bjorn, Any thoughts on this? Thanks. Kar Hin Ong
