On Thu, Nov 07, 2019 at 07:52:46AM -0600, Bjorn Helgaas wrote: > > > What would happen if a device below one of the non-hotplug bridges, > > > e.g., 3a:00.0, had an I/O BAR? Would this patch still work? > > > > I think it would still work because now we call pci_bus_size_bridges() > > only for non-hotplug bridge which do not have I/O window open so > > pbus_size_io() fails to find the "free" I/O resource on that bus and the > > kernel then fails to assign that I/O resource for the device. > > Not sure I understand; are you saying that we wouldn't have the EC/GPE > issue, but we'd be unable to use a device below 3a:00.0 that happened > to have an I/O BAR? Yes. > That doesn't sound optimal because there is I/O space available that > could be routed to 3a:00.0 If the none of the upstream bridges up to the PCIe root port does not have I/O window open, I don't think we can do much about it. Unless I'm missing something of course.
