> This looks fine, however are the earlier lines still correct? Yes, according to TI Keystone PCIe datasheet pg. 3-10 OB_SIZE register should hold log2 of actual window size in MB (bits 2-0): 0h = 1MB 1h = 2MB 2h = 4MB 3h = 8MB But OB_OFFSET_INDEXn/OB_OFFSETn_HI register pair hold absolute 64-bit bus address, so 'start' variable sholud be incremented by 8M to map all PCIe data space (according to the comment above the loop). TI confirms this bug for for kernel v4.14, but since then some driver code relocation happend and I've decided to report this here. Regards, Yurii
